MSP430FR2033 Datasheet, PDF (67/89 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FR2033, MSP430FR2032
SLASE45B – OCTOBER 2014 – REVISED AUGUST 2015
Table 6-48. eUSCI_B0 Registers (Base Address: 0540h) (continued)
REGISTER DESCRIPTION
eUSCI_B I2C own address 1
eUSCI_B I2C own address 2
eUSCI_B I2C own address 3
eUSCI_B receive address
eUSCI_B address mask
eUSCI_B I2C slave address
eUSCI_B interrupt enable
eUSCI_B interrupt flags
eUSCI_B interrupt vector word
REGISTER
UCB0I2COA1
UCB0I2COA2
UCB0I2COA3
UCB0ADDRX
UCB0ADDMASK
UCB0I2CSA
UCB0IE
UCB0IFG
UCB0IV
OFFSET
16h
18h
1Ah
1Ch
1Eh
20h
2Ah
2Ch
2Eh
Table 6-49. Backup Memory Registers (Base Address: 0660h)
REGISTER DESCRIPTION
Backup Memory 0
Backup Memory 1
Backup Memory 2
Backup Memory 3
Backup Memory 4
Backup Memory 5
Backup Memory 6
Backup Memory 7
Backup Memory 8
Backup Memory 9
Backup Memory 10
Backup Memory 11
Backup Memory 12
Backup Memory 13
Backup Memory 14
Backup Memory 15
REGISTER
BAKMEM0
BAKMEM1
BAKMEM2
BAKMEM3
BAKMEM4
BAKMEM5
BAKMEM6
BAKMEM7
BAKMEM8
BAKMEM9
BAKMEM10
BAKMEM11
BAKMEM12
BAKMEM13
BAKMEM14
BAKMEM15
OFFSET
00h
02h
04h
06h
08h
0Ah
0Ch
0Eh
10h
12h
14h
16h
18h
1Ah
1Ch
1Eh
Table 6-50. ADC Registers (Base Address: 0700h)
REGISTER DESCRIPTION
ADC control register 0
ADC control register 1
ADC control register 2
ADC window comparator low threshold
ADC window comparator high threshold
ADC memory control register 0
ADC conversion memory register
ADC interrupt enable
ADC interrupt flags
ADC interrupt vector word
REGISTER
ADCCTL0
ADCCTL1
ADCCTL2
ADCLO
ADCHI
ADCMCTL0
ADCMEM0
ADCIE
ADCIFG
ADCIV
OFFSET
00h
02h
04h
06h
08h
0Ah
12h
1Ah
1Ch
1Eh
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Detailed Description
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