MSP430FR2033 Datasheet, PDF (7/89 Pages) Texas Instruments – Mixed-Signal Microcontrollers

www.ti.com
Figure 4-2 shows the 56-pin G56 package.
MSP430FR2033, MSP430FR2032
SLASE45B – OCTOBER 2014 – REVISED AUGUST 2015
P7.5
1
P7.4
2
P7.3
3
P7.2
4
P7.1
5
P7.0
6
P4.7
7
P4.6
8
P4.5
9
P4.4
10
P4.3
11
P4.2/XOUT
12
P4.1/XIN
13
DVSS
14
DVCC
15
RST/NMI/SBWTDIO
16
TEST/SBWTCK
17
P4.0/TA1.1
18
P8.3/TA1.2
19
P8.2/TA1CLK
20
P1.7/TA0.1/TDO/A7
21
P1.6/TA0.2/TDI/TCLK/A6
22
P1.5/TA0CLK/TMS/A5
23
P1.4/MCLK/TCK/A4/VREF+
24
P1.3/UCA0STE/A3
25
P1.2/UCA0CLK/A2
26
P1.1/UCA0RXD/UCA0SOMI/A1/Veref+
27
P1.0/UCA0TXD/UCA0SIMO/A0/Veref–
28
56
P3.0
55
P3.1
54
P3.2
53
P3.3
52
P3.4
51
P3.5
50
P3.6
49
P3.7
48
P6.0
47
P6.1
46
P6.2
45
P6.3
44
P6.4
43
P6.5
42
P2.0
41
P2.1
40
P2.2
39
P2.3
38
P2.4
37
P2.5
36
P2.6
35
P2.7
34
P5.0/UCB0STE
33
P5.1/UCB0CLK
32
P5.2/UCB0SIMO/UCB0SDA
31
P5.3/UCB0SOMI/UCB0SCL
30
P5.4
29
P5.5
Figure 4-2. 56-Pin DGG (TSSOP) Designation (Top View)
Copyright © 2014–2015, Texas Instruments Incorporated
Terminal Configuration and Functions
7
Submit Documentation Feedback
Product Folder Links: MSP430FR2033 MSP430FR2032