MSP430FR2033 Datasheet, PDF (4/89 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR2033, MSP430FR2032
SLASE45B – OCTOBER 2014 – REVISED AUGUST 2015
www.ti.com
Table of Contents
1 Device Overview ......................................... 1
1.1 Features .............................................. 1
1.2 Applications........................................... 1
1.3 Description............................................ 2
1.4 Functional Block Diagram ............................ 3
2 Revision History ......................................... 4
3 Device Comparison ..................................... 5
4 Terminal Configuration and Functions.............. 6
4.1 Pin Diagrams ......................................... 6
4.2 Signal Descriptions ................................... 9
4.3 Pin Multiplexing ..................................... 12
4.4 Connection of Unused Pins ......................... 12
5 Specifications ........................................... 13
5.1 Absolute Maximum Ratings ......................... 13
5.2 ESD Ratings ........................................ 13
5.3 Recommended Operating Conditions............... 13
5.4 Active Mode Supply Current Into V_CC Excluding
External Current..................................... 14
5.5 Active Mode Supply Current Per MHz .............. 14
5.6 LEoxwcl-uPdoinwgerEMxteordneaLl PCMur0reSnut_.p_.p_..ly_..C_..u_.r_.r_.e_.n_.t_.s_..I_.n_.t_.o_..V_{.C..C.. 14}
5.7 Low-Power Mode LPM3, LPM4 Supply Currents
(Into V_CC) Excluding External Current .............. 15
5.8 Low-Power Mode LPMx.5 Supply Currents (Into
V_CC) Excluding External Current .................... 15
5.9 Typical Characteristics, Low-Power Mode Supply
Currents ............................................. 16
5.10 Typical Characteristics - Current Consumption Per
Module .............................................. 17
5.11 Thermal Characteristics............................. 17
5.12 Timing and Switching Characteristics ............... 18
6 Detailed Description ................................... 32
6.1 CPU ................................................. 32
6.2 Operating Modes.................................... 32
6.3 Interrupt Vector Addresses.......................... 33
6.4 Bootstrap Loader (BSL) ............................. 34
6.5 JTAG Standard Interface............................ 34
6.6 Spy-Bi-Wire Interface (SBW)........................ 35
6.7 FRAM................................................ 35
6.8 Memory Protection .................................. 35
6.9 Peripherals .......................................... 36
6.10 Device Descriptors (TLV) ........................... 60
6.11 Memory.............................................. 61
6.12 Identification ......................................... 68
7 Applications, Implementation, and Layout........ 69
7.1 Device Connection and Layout Fundamentals...... 69
7.2 Peripheral- and Interface-Specific Design
Information .......................................... 72
8 Device and Documentation Support ............... 74
8.1 Device Support ...................................... 74
8.2 Documentation Support ............................. 76
8.3 Trademarks.......................................... 77
8.4 Electrostatic Discharge Caution..................... 77
8.5 Glossary ............................................. 77
9 Mechanical Packaging and Orderable
Information .............................................. 78
9.1 Packaging Information .............................. 78
2 Revision History
Changes from November 1, 2014 to August 14, 2015
Page
• Corrected "10-BIT ADC CHANNELS" column for MSP430FR2032IPM in Table 3-1, Device Comparison .............. 5
• Added T_stg MIN and MAX values.................................................................................................. 13
• Added Section 5.2, ESD Ratings.................................................................................................. 13
• Changed all graphs in Section 5.9, Typical Characteristics, Low-Power Mode Supply Currents, for new
measurements ...................................................................................................................... 16
• Added V_{REF, 1.2V} parameter to Table 5-1, PMM, SVS and BOR............................................................... 18
• Changed t_STE,LEAD MIN value at 2 V from 40 ns to 50 ns ...................................................................... 26
• Changed t_STE,LEAD MIN value at 3 V from 24 ns to 45 ns ...................................................................... 26
• Changed t_VALID,SO MAX value at 2 V from 55 ns to 65 ns ...................................................................... 26
• Changed t_VALID,SO MAX value at 3 V from 30 ns to 40 ns ...................................................................... 26
• Changed f_ADCOSC TYP value from 4.5 MHz to 5.0 MHz ........................................................................ 29
• In Table 6-1, Operating Modes, changed the entry for "Power Consumption at 25°C, 3 V" in AM from
100 µA/MHz to 126 µA/MHz ....................................................................................................... 32
• In Table 6-1, Operating Modes, added "with RTC only" to the entry for "Power Consumption at 25°C, 3 V" in
LPM3.5 ............................................................................................................................... 32
• In Table 6-2, Interrupt Sources, Flags, and Vectors, removed "FRAM access time error" (ACCTEIFG) from the
"System NMI" row .................................................................................................................. 33
4
Revision History
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