English
Language : 

MSP430FR2033 Datasheet, PDF (35/89 Pages) Texas Instruments – Mixed-Signal Microcontrollers
www.ti.com
MSP430FR2033, MSP430FR2032
SLASE45B – OCTOBER 2014 – REVISED AUGUST 2015
Table 6-4. JTAG Pin Requirements and Function
DEVICE SIGNAL
P1.4/MCLK/TCK/A4/VREF+
P1.5/TA0CLK/TMS/A5
P1.6/TA0.2/TDI/TCLK/A6
P1.7/TA0.1/TDO/A7
TEST/SBWTCK
RST/NMI/SBWTDIO
VCC
VSS
DIRECTION
IN
IN
IN
OUT
IN
IN
JTAG FUNCTION
JTAG clock input
JTAG state control
JTAG data input/TCLK input
JTAG data output
Enable JTAG pins
External Reset
Power Supply
Ground Supply
6.6 Spy-Bi-Wire Interface (SBW)
The MSP430 family supports the 2-wire Spy-Bi-Wire interface. Spy-Bi-Wire can be used to interface with
MSP430 development tools and device programmers. Table 6-5 shows the Spy-Bi-Wire interface pin
requirements. For further details on interfacing to development tools and device programmers, refer to the
MSP430 Hardware Tools User's Guide (SLAU278).
Table 6-5. Spy-Bi-Wire Pin Requirements and Functions
DEVICE SIGNAL
TEST/SBWTCK
RST/NMI/SBWTDIO
VCC
VSS
DIRECTION
IN
IN, OUT
SBW FUNCTION
Spy-Bi-Wire clock input
Spy-Bi-Wire data input/output
Power Supply
Ground Supply
6.7 FRAM
The FRAM can be programmed using the JTAG port, Spy-Bi-Wire (SBW), the BSL, or in-system by the
CPU. Features of the FRAM include:
• Byte and word access capability
• Programmable wait state generation
• Error correction coding (ECC)
6.8 Memory Protection
The device features memory protection that can restrict user access and enable write protection:
• Securing the whole memory map to prevent unauthorized access from JTAG port or BSL, by writing
JTAG and BSL signatures using the JTAG port, SBW, the BSL, or in-system by the CPU.
• Write protection enabled to prevent unwanted write operation to FRAM contents by setting the control
bits in System Configuration register 0. For more detailed information, refer to the SYS chapter in the
MSP430FR4xx and MSP430FR2xx Family User's Guide (SLAU445).
NOTE
The FRAM is protected by default on PUC. To write to FRAM during code execution, the
application must first clear the corresponding PFWP or DFWP bit in System Configuration
Register 0 to unprotect the FRAM.
Copyright © 2014–2015, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: MSP430FR2033 MSP430FR2032
Detailed Description
35