MSP430FR2033 Datasheet, PDF (31/89 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FR2033, MSP430FR2032
SLASE45B – OCTOBER 2014 – REVISED AUGUST 2015
5.12.8 FRAM
Table 5-20. FRAM
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
Read and write endurance
TEST CONDITIONS
MIN
10¹⁵
t_Retention Data retention duration
T_J = 25°C
100
T_J = 70°C
40
T_J = 85°C
10
MAX UNIT
cycles
years
5.12.9 Emulation and Debug
Table 5-21. JTAG and Spy-Bi-Wire Interface Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
f_SBW
t_SBW,Low
t_{SBW, En}
t_SBW,Rst
f_TCK
PARAMETER
Spy-Bi-Wire input frequency
Spy-Bi-Wire low clock pulse duration
Spy-Bi-Wire enable time (TEST high to acceptance of first clock edge) ⁽¹⁾
Spy-Bi-Wire return to normal operation time
TCK input frequency, 4-wire JTAG ⁽²⁾
V_CC
2 V, 3 V
2 V, 3 V
2 V, 3 V
2V
3V
MIN TYP
0
0.028
15
0
0
R_internal Internal pulldown resistance on TEST
2 V, 3 V
20
35
MAX
10
15
110
100
16
16
50
UNIT
MHz
µs
µs
µs
MHz
kΩ
(1) Tools that access the Spy-Bi-Wire interface must wait for the t_SBW,En time after pulling the TEST/SBWTCK pin high before applying the
first SBWTCK clock edge.
(2) f_TCK may be restricted to meet the timing requirements of the module selected.
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Specifications
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