MSP430FR2033 Datasheet, PDF (63/89 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FR2033, MSP430FR2032
SLASE45B – OCTOBER 2014 – REVISED AUGUST 2015
Table 6-32. Special Function Registers (Base Address: 0100h)
REGISTER DESCRIPTION
SFR interrupt enable
SFR interrupt flag
SFR reset pin control
REGISTER
SFRIE1
SFRIFG1
SFRRPCR
OFFSET
00h
02h
04h
Table 6-33. PMM Registers (Base Address: 0120h)
REGISTER DESCRIPTION
PMM Control 0
PMM Control 1
PMM Control 2
PMM interrupt flags
PM5 Control 0
REGISTER
PMMCTL0
PMMCTL1
PMMCTL2
PMMIFG
PM5CTL0
OFFSET
00h
02h
04h
0Ah
10h
Table 6-34. SYS Registers (Base Address: 0140h)
REGISTER DESCRIPTION
System control
Bootstrap loader configuration area
JTAG mailbox control
JTAG mailbox input 0
JTAG mailbox input 1
JTAG mailbox output 0
JTAG mailbox output 1
Bus Error vector generator
User NMI vector generator
System NMI vector generator
Reset vector generator
System configuration 0
System configuration 1
System configuration 2
REGISTER
SYSCTL
SYSBSLC
SYSJMBC
SYSJMBI0
SYSJMBI1
SYSJMBO0
SYSJMBO1
SYSBERRIV
SYSUNIV
SYSSNIV
SYSRSTIV
SYSCFG0
SYSCFG1
SYSCFG2
OFFSET
00h
02h
06h
08h
0Ah
0Ch
0Eh
18h
1Ah
1Ch
1Eh
20h
22h
24h
Table 6-35. CS Registers (Base Address: 0180h)
REGISTER DESCRIPTION
CS control register 0
CS control register 1
CS control register 2
CS control register 3
CS control register 4
CS control register 5
CS control register 6
CS control register 7
CS control register 8
REGISTER
CSCTL0
CSCTL1
CSCTL2
CSCTL3
CSCTL4
CSCTL5
CSCTL6
CSCTL7
CSCTL8
OFFSET
00h
02h
04h
06h
08h
0Ah
0Ch
0Eh
10h
Table 6-36. FRAM Registers (Base Address: 01A0h)
FRAM control 0
General control 0
General control 1
REGISTER DESCRIPTION
REGISTER
FRCTL0
GCCTL0
GCCTL1
OFFSET
00h
04h
06h
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Detailed Description
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