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MSP430FR2033 Datasheet, PDF (28/89 Pages) Texas Instruments – Mixed-Signal Microcontrollers
MSP430FR2033, MSP430FR2032
SLASE45B – OCTOBER 2014 – REVISED AUGUST 2015
www.ti.com
Table 5-16. eUSCI (I2C Mode) Switching Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5-13)
feUSCI
PARAMETER
eUSCI input clock frequency
TEST CONDITIONS
Internal: SMCLK, MODCLK
External: UCLK
Duty cycle = 50% ±10%
VCC
MIN TYP MAX UNIT
16 MHz
fSCL
tHD,STA
tSU,STA
tHD,DAT
tSU,DAT
tSU,STO
SCL clock frequency
Hold time (repeated) START
Setup time for a repeated START
Data hold time
Data setup time
Setup time for STOP
fSCL = 100 kHz
fSCL > 100 kHz
fSCL = 100 kHz
fSCL > 100 kHz
fSCL = 100 kHz
fSCL > 100 kHz
UCGLITx = 0
2 V, 3 V
0
4.0
2 V, 3 V
0.6
4.7
2 V, 3 V
0.6
2 V, 3 V
0
2 V, 3 V
250
4.0
2 V, 3 V
0.6
50
400 kHz
µs
µs
ns
ns
µs
600
tSP
Pulse duration of spikes suppressed by UCGLITx = 1
input filter
UCGLITx = 2
25
2 V, 3 V
12.5
300
ns
150
UCGLITx = 3
6.3
75
UCCLTOx = 1
27
tTIMEOUT Clock low time-out
UCCLTOx = 2
UCCLTOx = 3
2 V, 3 V
30
ms
33
SDA
tHD,STA
tSU,STA
tHD,STA
tBUF
tLOW
tHIGH
tSP
SCL
tHD,DAT
tSU,DAT
Figure 5-13. I2C Mode Timing
tSU,STO
28
Specifications
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