MSP430FR2033 Datasheet, PDF (38/89 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR2033, MSP430FR2032
SLASE45B – OCTOBER 2014 – REVISED AUGUST 2015
www.ti.com
6.9.4 Watchdog Timer (WDT)
The primary function of the WDT module is to perform a controlled system restart after a software problem
occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not
needed in an application, the module can be configured as interval timer and can generate interrupts at
selected time intervals.
Table 6-7. WDT Clocks
WDTSSELx
00
01
10
11
NORMAL OPERATION
(WATCHDOG AND INTERVAL TIMER MODE)
SMCLK
ACLK
VLOCLK
VLOCLK
6.9.5 System Module (SYS)
The SYS module handles many of the system functions within the device. These include Power-On Reset
(POR) and Power-Up Clear (PUC) handling, NMI source selection and management, reset interrupt vector
generators, bootstrap loader entry mechanisms, and configuration management (device descriptors). SYS
also includes a data exchange mechanism through SBW called a JTAG mailbox mail box that can be used
in the application.
INTERRUPT VECTOR
REGISTER
SYSRSTIV, System Reset
Table 6-8. System Module Interrupt Vector Registers
ADDRESS
015Eh
INTERRUPT EVENT
No interrupt pending
Brownout (BOR)
RSTIFG RST/NMI (BOR)
PMMSWBOR software BOR (BOR)
LPMx.5 wakeup (BOR)
Security violation (BOR)
Reserved
SVSHIFG SVSH event (BOR)
Reserved
Reserved
PMMSWPOR software POR (POR)
WDTIFG watchdog time-out (PUC)
WDTPW password violation (PUC)
FRCTLPW password violation (PUC)
Uncorrectable FRAM bit error detection
Peripheral area fetch (PUC)
PMMPW PMM password violation (PUC)
Reserved
FLL unlock (PUC)
Reserved
VALUE
00h
02h
04h
06h
08h
0Ah
0Ch
0Eh
10h
12h
14h
16h
18h
1Ah
1Ch
1Eh
20h
22h
24h
26h to 3Eh
PRIORITY
Highest
Lowest
38
Detailed Description
Copyright © 2014–2015, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: MSP430FR2033 MSP430FR2032