LM3S5652 Datasheet, PDF (8/848 Pages) Texas Instruments – Stellaris® LM3S5652 Microcontroller

Table of Contents
15.6 Register Descriptions (I²C Master) ............................................................................... 592
15.7 Register Descriptions (I²C Slave) ................................................................................. 605
16 Controller Area Network (CAN) Module ............................................................. 614
16.1 Block Diagram ............................................................................................................ 615
16.2 Signal Description ....................................................................................................... 615
16.3 Functional Description ................................................................................................. 616
16.3.1 Initialization ................................................................................................................. 617
16.3.2 Operation ................................................................................................................... 617
16.3.3 Transmitting Message Objects ..................................................................................... 618
16.3.4 Configuring a Transmit Message Object ........................................................................ 618
16.3.5 Updating a Transmit Message Object ........................................................................... 620
16.3.6 Accepting Received Message Objects .......................................................................... 620
16.3.7 Receiving a Data Frame .............................................................................................. 620
16.3.8 Receiving a Remote Frame .......................................................................................... 621
16.3.9 Receive/Transmit Priority ............................................................................................. 621
16.3.10 Configuring a Receive Message Object ........................................................................ 621
16.3.11 Handling of Received Message Objects ........................................................................ 622
16.3.12 Handling of Interrupts .................................................................................................. 625
16.3.13 Test Mode ................................................................................................................... 625
16.3.14 Bit Timing Configuration Error Considerations ............................................................... 627
16.3.15 Bit Time and Bit Rate ................................................................................................... 627
16.3.16 Calculating the Bit Timing Parameters .......................................................................... 629
16.4 Register Map .............................................................................................................. 632
16.5 CAN Register Descriptions .......................................................................................... 634
17 Universal Serial Bus (USB) Controller ............................................................... 660
17.1 Block Diagram ............................................................................................................ 661
17.2 Signal Description ....................................................................................................... 661
17.3 Functional Description ................................................................................................. 662
17.3.1 Operation as a Device ................................................................................................. 662
17.3.2 Operation as a Host .................................................................................................... 667
17.3.3 OTG Mode .................................................................................................................. 671
17.3.4 DMA Operation ........................................................................................................... 673
17.4 Initialization and Configuration ..................................................................................... 674
17.4.1 Pin Configuration ......................................................................................................... 674
17.4.2 Endpoint Configuration ................................................................................................ 674
17.5 Register Map .............................................................................................................. 675
17.6 Register Descriptions .................................................................................................. 678
18 Analog Comparator .............................................................................................. 758
18.1 Block Diagram ............................................................................................................ 758
18.2 Signal Description ....................................................................................................... 758
18.3 Functional Description ................................................................................................. 759
18.3.1 Internal Reference Programming .................................................................................. 760
18.4 Initialization and Configuration ..................................................................................... 761
18.5 Register Map .............................................................................................................. 761
18.6 Register Descriptions .................................................................................................. 762
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November 17, 2011
Texas Instruments-Production Data