LM3S5652 Datasheet, PDF (686/848 Pages) Texas Instruments – Stellaris® LM3S5652 Microcontroller

Universal Serial Bus (USB) Controller
Register 6: USB Receive Interrupt Enable (USBRXIE), offset 0x008
OTG A /
Host
OTG B /
USBRXIE is a 16-bit register that provides interrupt enable bits for the interrupts in the USBRXIS
register. When a bit is set, the USB interrupt is asserted to the interrupt controller when the
corresponding interrupt bit in the USBRXIS register is set. When a bit is cleared, the interrupt in the
USBRXIS register is still set but the USB interrupt to the interrupt controller is not asserted. On
reset, the bits corresponding to receive endpoints 1-3 are set to 1, while the remaining bits are set
to 0.
Device
USB Receive Interrupt Enable (USBRXIE)
Base 0x4005.0000
Offset 0x008
Type R/W, reset 0x000E
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
EP3
EP2
EP1
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
Bit/Field
15:4
3
2
1
0
Name
reserved
EP3
EP2
EP1
reserved
Type
RO
R/W
R/W
R/W
RO
Reset
0x00
1
1
1
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RX Endpoint 3 Interrupt Enable
RX Endpoint 2 Interrupt Enable
RX Endpoint 1 Interrupt Enable
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
686
November 17, 2011
Texas Instruments-Production Data