LM3S5652 Datasheet, PDF (755/848 Pages) Texas Instruments – Stellaris® LM3S5652 Microcontroller

Stellaris® LM3S5652 Microcontroller
OTG A /
Host
OTG B /
Device
31
Type RO
Reset
0
15
Type RO
Reset
0
Register 94: USB Device RESUME Interrupt Mask (USBDRIM), offset 0x414
The USBDRIM 32-bit register is the masked interrupt status register. On a read, this register gives
the current value of the mask on the corresponding interrupt. Setting a bit sets the mask, preventing
the interrupt from being signaled to the interrupt controller. Clearing a bit clears the corresponding
mask, enabling the interrupt to be sent to the interrupt controller.
USB Device RESUME Interrupt Mask (USBDRIM)
Base 0x4005.0000
Offset 0x414
Type R/W, reset 0x0000.0000
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
RESUME
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:1
0
Name
reserved
RESUME
Type
RO
R/W
Reset
0x00
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RESUME Interrupt Mask
Value Description
1 The raw interrupt signal from a detected RESUME is sent to
the interrupt controller. This bit should only be set when a
SUSPEND has been detected (the SUSPEND bit in the USBIS
register is set).
0 A detected RESUME does not affect the interrupt status.
November 17, 2011
755
Texas Instruments-Production Data