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LM3S5652 Datasheet, PDF (25/848 Pages) Texas Instruments – Stellaris® LM3S5652 Microcontroller
Stellaris® LM3S5652 Microcontroller
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USB Transmit Interrupt Status (USBTXIS), offset 0x002 ................................................... 683
USB Receive Interrupt Status (USBRXIS), offset 0x004 ................................................... 684
USB Transmit Interrupt Enable (USBTXIE), offset 0x006 .................................................. 685
USB Receive Interrupt Enable (USBRXIE), offset 0x008 .................................................. 686
USB General Interrupt Status (USBIS), offset 0x00A ........................................................ 687
USB Interrupt Enable (USBIE), offset 0x00B .................................................................... 690
USB Frame Value (USBFRAME), offset 0x00C ................................................................ 693
USB Endpoint Index (USBEPIDX), offset 0x00E .............................................................. 694
USB Test Mode (USBTEST), offset 0x00F ....................................................................... 695
USB FIFO Endpoint 0 (USBFIFO0), offset 0x020 ............................................................. 697
USB FIFO Endpoint 1 (USBFIFO1), offset 0x024 ............................................................. 697
USB FIFO Endpoint 2 (USBFIFO2), offset 0x028 ............................................................. 697
USB FIFO Endpoint 3 (USBFIFO3), offset 0x02C ............................................................ 697
USB Device Control (USBDEVCTL), offset 0x060 ............................................................ 698
USB Transmit Dynamic FIFO Sizing (USBTXFIFOSZ), offset 0x062 ................................. 700
USB Receive Dynamic FIFO Sizing (USBRXFIFOSZ), offset 0x063 .................................. 700
USB Transmit FIFO Start Address (USBTXFIFOADD), offset 0x064 ................................. 701
USB Receive FIFO Start Address (USBRXFIFOADD), offset 0x066 .................................. 701
USB Connect Timing (USBCONTIM), offset 0x07A .......................................................... 702
USB OTG VBUS Pulse Timing (USBVPLEN), offset 0x07B .............................................. 703
USB Full-Speed Last Transaction to End of Frame Timing (USBFSEOF), offset 0x07D ...... 704
USB Low-Speed Last Transaction to End of Frame Timing (USBLSEOF), offset 0x07E ...... 705
USB Transmit Functional Address Endpoint 0 (USBTXFUNCADDR0), offset 0x080 ........... 706
USB Transmit Functional Address Endpoint 1 (USBTXFUNCADDR1), offset 0x088 ........... 706
USB Transmit Functional Address Endpoint 2 (USBTXFUNCADDR2), offset 0x090 ........... 706
USB Transmit Functional Address Endpoint 3 (USBTXFUNCADDR3), offset 0x098 ........... 706
USB Transmit Hub Address Endpoint 0 (USBTXHUBADDR0), offset 0x082 ...................... 707
USB Transmit Hub Address Endpoint 1 (USBTXHUBADDR1), offset 0x08A ...................... 707
USB Transmit Hub Address Endpoint 2 (USBTXHUBADDR2), offset 0x092 ...................... 707
USB Transmit Hub Address Endpoint 3 (USBTXHUBADDR3), offset 0x09A ...................... 707
USB Transmit Hub Port Endpoint 0 (USBTXHUBPORT0), offset 0x083 ............................. 708
USB Transmit Hub Port Endpoint 1 (USBTXHUBPORT1), offset 0x08B ............................ 708
USB Transmit Hub Port Endpoint 2 (USBTXHUBPORT2), offset 0x093 ............................. 708
USB Transmit Hub Port Endpoint 3 (USBTXHUBPORT3), offset 0x09B ............................ 708
USB Receive Functional Address Endpoint 1 (USBRXFUNCADDR1), offset 0x08C ........... 709
USB Receive Functional Address Endpoint 2 (USBRXFUNCADDR2), offset 0x094 ........... 709
USB Receive Functional Address Endpoint 3 (USBRXFUNCADDR3), offset 0x09C ........... 709
USB Receive Hub Address Endpoint 1 (USBRXHUBADDR1), offset 0x08E ...................... 710
USB Receive Hub Address Endpoint 2 (USBRXHUBADDR2), offset 0x096 ....................... 710
USB Receive Hub Address Endpoint 3 (USBRXHUBADDR3), offset 0x09E ...................... 710
USB Receive Hub Port Endpoint 1 (USBRXHUBPORT1), offset 0x08F ............................. 711
USB Receive Hub Port Endpoint 2 (USBRXHUBPORT2), offset 0x097 ............................. 711
USB Receive Hub Port Endpoint 3 (USBRXHUBPORT3), offset 0x09F ............................. 711
USB Maximum Transmit Data Endpoint 1 (USBTXMAXP1), offset 0x110 .......................... 712
USB Maximum Transmit Data Endpoint 2 (USBTXMAXP2), offset 0x120 .......................... 712
USB Maximum Transmit Data Endpoint 3 (USBTXMAXP3), offset 0x130 .......................... 712
USB Control and Status Endpoint 0 Low (USBCSRL0), offset 0x102 ................................. 713
USB Control and Status Endpoint 0 High (USBCSRH0), offset 0x103 ............................... 717
November 17, 2011
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