LM3S5652 Datasheet, PDF (218/848 Pages) Texas Instruments – Stellaris® LM3S5652 Microcontroller

System Control
Register 22: Device Capabilities 7 (DC7), offset 0x028
This register is predefined by the part and can be used to verify uDMA channel features.
Device Capabilities 7 (DC7)
Base 0x400F.E000
Offset 0x028
Type RO, reset 0x4000.0F3F
31
30
29
28
reserved
SW
Type RO
RO
RO
RO
Reset
0
1
0
0
15
14
13
12
reserved
Type RO
RO
RO
RO
Reset
0
0
0
0
27
26
25
24
RO
RO
RO
RO
0
0
0
0
11
10
9
8
SSI0_TX SSI0_RX UART0_TX UART0_RX
RO
RO
RO
RO
1
1
1
1
23
22
21
20
19
18
17
16
reserved
RO
RO
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
0
0
7
6
reserved
RO
RO
0
0
5
4
3
2
1
0
USB_EP3_TX USB_EP3_RX USB_EP2_TX USB_EP2_RX USB_EP1_TX USB_EP1_RX
RO
RO
RO
RO
RO
RO
1
1
1
1
1
1
Bit/Field
31
30
29:12
11
10
9
8
7:6
5
4
3
2
1
Name
reserved
SW
reserved
SSI0_TX
SSI0_RX
UART0_TX
UART0_RX
reserved
USB_EP3_TX
USB_EP3_RX
USB_EP2_TX
USB_EP2_RX
USB_EP1_TX
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
1
0
1
1
1
1
0
1
1
1
1
1
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Software transfer on uDMA Ch30. When set, indicates uDMA channel
30 is available for software.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SSI0 TX on uDMA Ch11. When set, indicates uDMA channel 11 is
available and connected to the transmit path of SSI module 0.
SSI0 RX on uDMA Ch10. When set, indicates uDMA channel 10 is
available and connected to the receive path of SSI module 0.
UART0 TX on uDMA Ch9. When set, indicates uDMA channel 9 is
available and connected to the transmit path of UART module 0.
UART0 RX on uDMA Ch8. When set, indicates uDMA channel 8 is
available and connected to the receive path of UART module 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
USB EP3 TX on uDMA Ch5. When set, indicates uDMA channel 5 is
available and connected to the transmit path of USB endpoint 3.
USB EP3 RX on uDMA Ch4. When set, indicates uDMA channel 4 is
available and connected to the receive path of USB endpoint 2.
USB EP2 TX on uDMA Ch3. When set, indicates uDMA channel 3 is
available and connected to the transmit path of USB endpoint 2.
USB EP2 RX on uDMA Ch2. When set, indicates uDMA channel 1 is
available and connected to the receive path of USB endpoint 2.
USB EP1 TX on uDMA Ch1. When set, indicates uDMA channel 1 is
available and connected to the transmit path of USB endpoint 1.
218
November 17, 2011
Texas Instruments-Production Data