LM3S5652 Datasheet, PDF (776/848 Pages) Texas Instruments – Stellaris® LM3S5652 Microcontroller

Signal Tables
Table 20-2. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Type^a Description
PD2
63
I/O
TTL
GPIO port D bit 2.
PD3
64
I/O
TTL
GPIO port D bit 3.
PE0
6
I/O
TTL
GPIO port E bit 0.
PE1
5
I/O
TTL
GPIO port E bit 1.
PE2
2
I/O
TTL
GPIO port E bit 2.
PE3
1
I/O
TTL
GPIO port E bit 3.
PE4
8
I/O
TTL
GPIO port E bit 4.
RST
40
I
TTL
System reset input.
SSI0Clk
19
I/O
TTL
SSI module 0 clock.
SSI0Fss
20
I/O
TTL
SSI module 0 frame.
SSI0Rx
21
I
TTL
SSI module 0 receive.
SSI0Tx
22
O
TTL
SSI module 0 transmit.
SWCLK
52
I
TTL
JTAG/SWD CLK.
SWDIO
51
I/O
TTL
JTAG TMS and SWDIO.
SWO
49
O
TTL
JTAG TDO and SWO.
TCK
52
I
TTL
JTAG/SWD CLK.
TDI
50
I
TTL
JTAG TDI.
TDO
49
O
TTL
JTAG TDO and SWO.
TMS
51
I/O
TTL
JTAG TMS and SWDIO.
U0Rx
17
I
TTL
UART module 0 receive. When in IrDA mode, this signal has
IrDA modulation.
U0Tx
18
O
TTL
UART module 0 transmit. When in IrDA mode, this signal has
IrDA modulation.
USB0DM
45
I/O
Analog Bidirectional differential data pin (D- per USB specification)
for USB0.
USB0DP
46
I/O
Analog Bidirectional differential data pin (D+ per USB specification)
for USB0.
USB0EPEN
14
O
TTL
Optionally used in Host mode to control an external power
source to supply power to the USB bus.
USB0ID
41
I
Analog This signal senses the state of the USB ID signal. The USB
PHY enables an integrated pull-up, and an external element
(USB connector) indicates the initial state of the USB controller
(pulled down is the A side of the cable and pulled up is the B
side).
USB0PFLT
15
I
TTL
Optionally used in Host mode by an external power source
to indicate an error state by that power source.
USB0RBIAS
48
O
Analog 9.1-kΩ resistor (1% precision) used internally for USB analog
circuitry.
USB0VBUS
42
I
Analog This signal is used during the session request protocol. This
signal allows the USB PHY to both sense the voltage level of
VBUS, and pull up VBUS momentarily during VBUS pulsing.
VBAT
37
-
Power Power source for the Hibernation module. It is normally
connected to the positive terminal of a battery and serves as
the battery backup/Hibernation module power-source supply.
776
November 17, 2011
Texas Instruments-Production Data