LM3S6C11 Datasheet, PDF (599/828 Pages) Texas Instruments – Stellaris® LM3S6C11 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Stellaris^® LM3S6C11 Microcontroller
Register 4: SSI Status (SSISR), offset 0x00C
The SSISR register contains bits that indicate the FIFO fill status and the SSI busy status.
SSI Status (SSISR)
SSI0 base: 0x4000.8000
SSI1 base: 0x4000.9000
Offset 0x00C
Type RO, reset 0x0000.0003
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
BSY
RFF
RNE
TNF
TFE
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
Bit/Field
31:5
4
Name
reserved
BSY
Type
RO
RO
Reset Description
0x0000.00 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
SSI Busy Bit
Value Description
0 The SSI is idle.
1 The SSI is currently transmitting and/or receiving a frame, or
the transmit FIFO is not empty.
3
RFF
RO
0
SSI Receive FIFO Full
Value Description
0 The receive FIFO is not full.
1 The receive FIFO is full.
2
RNE
RO
0
SSI Receive FIFO Not Empty
Value Description
0 The receive FIFO is empty.
1 The receive FIFO is not empty.
1
TNF
RO
1
SSI Transmit FIFO Not Full
Value Description
0 The transmit FIFO is full.
1 The transmit FIFO is not full.
July 24, 2012
599
Texas Instruments-Production Data