LM3S6C11 Datasheet, PDF (358/828 Pages) Texas Instruments – Stellaris® LM3S6C11 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Micro Direct Memory Access (μDMA)
Register 3: DMA Channel Control Word (DMACHCTL), offset 0x008
DMA Channel Control Word (DMACHCTL) is part of the Channel Control Structure and is used
to specify parameters of a μDMA transfer.
Note: The offset specified is from the base address of the control structure in system memory,
not the μDMA module base address.
DMA Channel Control Word (DMACHCTL)
Base n/a
Offset 0x008
Type R/W, reset -
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
DSTINC
DSTSIZE
SRCINC
SRCSIZE
reserved
ARBSIZE
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Type
Reset
15
14
ARBSIZE
R/W
R/W
-
-
13
R/W
-
12
R/W
-
11
R/W
-
10
R/W
-
9
8
XFERSIZE
R/W
R/W
-
-
7
R/W
-
6
R/W
-
5
R/W
-
4
3
2
1
0
NXTUSEBURST
XFERMODE
R/W
R/W
R/W
R/W
R/W
-
-
-
-
-
Bit/Field
31:30
Name
DSTINC
Type
R/W
Reset
-
Description
Destination Address Increment
This field configures the destination address increment.
The address increment value must be equal or greater than the value
of the destination size (DSTSIZE).
Value Description
0x0 Byte
Increment by 8-bit locations
0x1 Half-word
Increment by 16-bit locations
0x2 Word
Increment by 32-bit locations
0x3 No increment
Address remains set to the value of the Destination Address
End Pointer (DMADSTENDP) for the channel
29:28
DSTSIZE
R/W
-
Destination Data Size
This field configures the destination item data size.
Note: DSTSIZE must be the same as SRCSIZE.
Value Description
0x0 Byte
8-bit data size
0x1 Half-word
16-bit data size
0x2 Word
32-bit data size
0x3 Reserved
358
July 24, 2012
Texas Instruments-Production Data