LM3S6C11 Datasheet, PDF (13/828 Pages) Texas Instruments – Stellaris® LM3S6C11 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Stellaris^® LM3S6C11 Microcontroller
List of Tables
Table 1.
Table 2.
Table 2-1.
Table 2-2.
Table 2-3.
Table 2-4.
Table 2-5.
Table 2-6.
Table 2-7.
Table 2-8.
Table 2-9.
Table 2-10.
Table 2-11.
Table 2-12.
Table 2-13.
Table 3-1.
Table 3-2.
Table 3-3.
Table 3-4.
Table 3-5.
Table 3-6.
Table 3-7.
Table 3-8.
Table 3-9.
Table 4-1.
Table 4-2.
Table 4-3.
Table 4-4.
Table 5-1.
Table 5-2.
Table 5-3.
Table 5-4.
Table 5-5.
Table 5-6.
Table 5-7.
Table 5-8.
Table 5-9.
Table 6-1.
Table 6-2.
Table 6-3.
Table 6-4.
Table 7-1.
Table 7-2.
Table 7-3.
Table 8-1.
Table 8-2.
Revision History .................................................................................................. 26
Documentation Conventions ................................................................................ 29
Summary of Processor Mode, Privilege Level, and Stack Use ................................ 53
Processor Register Map ....................................................................................... 54
PSR Register Combinations ................................................................................. 59
Memory Map ....................................................................................................... 67
Memory Access Behavior ..................................................................................... 70
SRAM Memory Bit-Banding Regions .................................................................... 72
Peripheral Memory Bit-Banding Regions ............................................................... 72
Exception Types .................................................................................................. 77
Interrupts ............................................................................................................ 78
Exception Return Behavior ................................................................................... 83
Faults ................................................................................................................. 83
Fault Status and Fault Address Registers .............................................................. 85
Cortex-M3 Instruction Summary ........................................................................... 87
Core Peripheral Register Regions ......................................................................... 90
Memory Attributes Summary ................................................................................ 93
TEX, S, C, and B Bit Field Encoding ..................................................................... 96
Cache Policy for Memory Attribute Encoding ......................................................... 97
AP Bit Field Encoding .......................................................................................... 97
Memory Region Attributes for Stellaris Microcontrollers .......................................... 97
Peripherals Register Map ..................................................................................... 98
Interrupt Priority Levels ...................................................................................... 125
Example SIZE Field Values ................................................................................ 153
JTAG_SWD_SWO Signals (100LQFP) ................................................................ 157
JTAG_SWD_SWO Signals (108BGA) ................................................................. 158
JTAG Port Pins State after Power-On Reset or RST assertion .............................. 159
JTAG Instruction Register Commands ................................................................. 164
System Control & Clocks Signals (100LQFP) ...................................................... 168
System Control & Clocks Signals (108BGA) ........................................................ 168
Reset Sources ................................................................................................... 169
Clock Source Options ........................................................................................ 176
Possible System Clock Frequencies Using the SYSDIV Field ............................... 179
Examples of Possible System Clock Frequencies Using the SYSDIV2 Field .......... 179
Examples of Possible System Clock Frequencies with DIV400=1 ......................... 180
System Control Register Map ............................................................................. 184
RCC2 Fields that Override RCC Fields ............................................................... 205
Hibernate Signals (100LQFP) ............................................................................. 260
Hibernate Signals (108BGA) .............................................................................. 261
Hibernation Module Clock Operation ................................................................... 267
Hibernation Module Register Map ....................................................................... 269
Flash Memory Protection Policy Combinations .................................................... 290
User-Programmable Flash Memory Resident Registers ....................................... 294
Flash Register Map ............................................................................................ 294
μDMA Channel Assignments .............................................................................. 334
Request Type Support ....................................................................................... 336
July 24, 2012
13
Texas Instruments-Production Data