LM3S6C11 Datasheet, PDF (10/828 Pages) Texas Instruments – Stellaris® LM3S6C11 Microcontroller

Table of Contents
OBSOLETE: TI has discontinued production of this device.
List of Figures
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Figure 2-1.
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Figure 2-7.
Figure 3-1.
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Figure 5-5.
Figure 6-1.
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Figure 6-3.
Figure 7-1.
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Figure 9-1.
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Figure 10-1.
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Figure 11-1.
Figure 12-1.
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Figure 12-5.
Figure 13-1.
Stellaris LM3S6C11 Microcontroller High-Level Block Diagram ............................... 32
CPU Block Diagram ............................................................................................. 50
TPIU Block Diagram ............................................................................................ 51
Cortex-M3 Register Set ........................................................................................ 53
Bit-Band Mapping ................................................................................................ 73
Data Storage ....................................................................................................... 74
Vector Table ........................................................................................................ 80
Exception Stack Frame ........................................................................................ 82
SRD Use Example ............................................................................................... 96
JTAG Module Block Diagram .............................................................................. 157
Test Access Port State Machine ......................................................................... 160
IDCODE Register Format ................................................................................... 166
BYPASS Register Format ................................................................................... 166
Boundary Scan Register Format ......................................................................... 167
Basic RST Configuration .................................................................................... 171
External Circuitry to Extend Power-On Reset ....................................................... 172
Reset Circuit Controlled by Switch ...................................................................... 172
Power Architecture ............................................................................................ 175
Main Clock Tree ................................................................................................ 178
Hibernation Module Block Diagram ..................................................................... 260
Using a Crystal as the Hibernation Clock Source ................................................. 263
Using a Dedicated Oscillator as the Hibernation Clock Source with VDD3ON
Mode ................................................................................................................ 263
Internal Memory Block Diagram .......................................................................... 286
μDMA Block Diagram ......................................................................................... 333
Example of Ping-Pong μDMA Transaction ........................................................... 339
Memory Scatter-Gather, Setup and Configuration ................................................ 341
Memory Scatter-Gather, μDMA Copy Sequence .................................................. 342
Peripheral Scatter-Gather, Setup and Configuration ............................................. 344
Peripheral Scatter-Gather, μDMA Copy Sequence ............................................... 345
Digital I/O Pads ................................................................................................. 396
Analog/Digital I/O Pads ...................................................................................... 397
GPIODATA Write Example ................................................................................. 398
GPIODATA Read Example ................................................................................. 398
GPTM Module Block Diagram ............................................................................ 445
Timer Daisy Chain ............................................................................................. 450
Input Edge-Count Mode Example ....................................................................... 452
16-Bit Input Edge-Time Mode Example ............................................................... 454
16-Bit PWM Mode Example ................................................................................ 455
WDT Module Block Diagram .............................................................................. 492
UART Module Block Diagram ............................................................................. 517
UART Character Frame ..................................................................................... 519
IrDA Data Modulation ......................................................................................... 521
LIN Message ..................................................................................................... 524
LIN Synchronization Field ................................................................................... 525
SSI Module Block Diagram ................................................................................. 580
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July 24, 2012
Texas Instruments-Production Data