LM3S6C11 Datasheet, PDF (168/828 Pages) Texas Instruments – Stellaris® LM3S6C11 Microcontroller

System Control
OBSOLETE: TI has discontinued production of this device.
5 System Control
System control configures the overall operation of the device and provides information about the
device. Configurable features include reset control, NMI operation, power control, clock control, and
low-power modes.
5.1 Signal Description
The following table lists the external signals of the System Control module and describes the function
of each. The NMI signal is the alternate function for the GPIO PB7 signal and functions as a GPIO
after reset. PB7 is under commit protection and requires a special process to be configured as any
alternate function or to subsequently return to the GPIO function, see “Commit Control” on page 399.
The column in the table below titled "Pin Mux/Pin Assignment" lists the GPIO pin placement for the
NMI signal. The AFSEL bit in the GPIO Alternate Function Select (GPIOAFSEL) register (page 413)
should be set to choose the NMI function. The number in parentheses is the encoding that must be
programmed into the PMCn field in the GPIO Port Control (GPIOPCTL) register (page 430) to assign
the NMI signal to the specified GPIO port pin. For more information on configuring GPIOs, see
“General-Purpose Input/Outputs (GPIOs)” on page 392. The remaining signals (with the word "fixed"
in the Pin Mux/Pin Assignment column) have a fixed pin assignment and function.
Table 5-1. System Control & Clocks Signals (100LQFP)
Pin Name
Pin Number Pin Mux / Pin Pin Type Buffer Type^a Description
Assignment
CMOD0
65
fixed
I
TTL
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
CMOD1
76
fixed
I
TTL
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
NMI
89
PB7 (4)
I
TTL
Non-maskable interrupt.
OSC0
48
fixed
I
Analog Main oscillator crystal input or an external clock
reference input.
OSC1
49
fixed
O
Analog Main oscillator crystal output. Leave unconnected
when using a single-ended clock source.
RST
64
fixed
I
TTL
System reset input.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
Table 5-2. System Control & Clocks Signals (108BGA)
Pin Name
Pin Number Pin Mux / Pin Pin Type Buffer Type^a Description
Assignment
CMOD0
E11
fixed
I
TTL
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
CMOD1
B10
fixed
I
TTL
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
NMI
A8
PB7 (4)
I
TTL
Non-maskable interrupt.
OSC0
L11
fixed
I
Analog Main oscillator crystal input or an external clock
reference input.
OSC1
M11
fixed
O
Analog Main oscillator crystal output. Leave unconnected
when using a single-ended clock source.
RST
H11
fixed
I
TTL
System reset input.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
168
July 24, 2012
Texas Instruments-Production Data