LM3S6C11 Datasheet, PDF (46/828 Pages) Texas Instruments – Stellaris® LM3S6C11 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Architectural Overview
1.3.5
1.3.5.1
1.3.6
– 2-mA, 4-mA, and 8-mA pad drive for digital communication; up to four pads can sink 18-mA
for high-current applications
– Slew rate control for the 8-mA drive
– Open drain enables
– Digital input enables
Analog
The LM3S6C11 microcontroller provides analog functions integrated into the device, including:
■ Two analog comparators
■ digital comparator
■ On-chip voltage regulator
The following provides more detail on these analog functions.
Analog Comparators (see page 718)
An analog comparator is a peripheral that compares two analog voltages and provides a logical
output that signals the comparison result. The LM3S6C11 microcontroller provides two independent
integrated analog comparators that can be configured to drive an output or generate an interrupt .
The comparator can provide its output to a device pin, acting as a replacement for an analog
comparator on the board, or it can be used to signal the application via interrupts.
The LM3S6C11 microcontroller provides two independent integrated analog comparators with the
following functions:
■ Compare external pin input to external pin input or to internal programmable voltage reference
■ Compare a test voltage against any one of the following voltages:
– An individual external reference voltage
– A shared single external reference voltage
– A shared internal reference voltage
JTAG and ARM Serial Wire Debug (see page 156)
The Joint Test Action Group (JTAG) port is an IEEE standard that defines a Test Access Port and
Boundary Scan Architecture for digital integrated circuits and provides a standardized serial interface
for controlling the associated test logic. The TAP, Instruction Register (IR), and Data Registers (DR)
can be used to test the interconnections of assembled printed circuit boards and obtain manufacturing
information on the components. The JTAG Port also provides a means of accessing and controlling
design-for-test features such as I/O pin observation and control, scan testing, and debugging. Texas
Instruments replaces the ARM SW-DP and JTAG-DP with the ARM Serial Wire JTAG Debug Port
(SWJ-DP) interface. The SWJ-DP interface combines the SWD and JTAG debug ports into one
module providing all the normal JTAG debug and test functionality plus real-time access to system
memory without halting the core or requiring any target resident code. The SWJ-DP interface has
the following features:
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July 24, 2012
Texas Instruments-Production Data