LM3S6C11 Datasheet, PDF (3/828 Pages) Texas Instruments – Stellaris® LM3S6C11 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Stellaris^® LM3S6C11 Microcontroller
Table of Contents
Revision History ............................................................................................................................. 26
About This Document .................................................................................................................... 28
Audience .............................................................................................................................................. 28
About This Manual ................................................................................................................................ 28
Related Documents ............................................................................................................................... 28
Documentation Conventions .................................................................................................................. 29
1
1.1
1.2
1.3
1.3.1
1.3.2
1.3.3
1.3.4
1.3.5
1.3.6
1.3.7
1.4
Architectural Overview .......................................................................................... 31
Overview ...................................................................................................................... 31
Target Applications ........................................................................................................ 33
Features ....................................................................................................................... 33
ARM Cortex-M3 Processor Core .................................................................................... 33
On-Chip Memory ........................................................................................................... 35
Serial Communications Peripherals ................................................................................ 36
System Integration ........................................................................................................ 40
Analog .......................................................................................................................... 46
JTAG and ARM Serial Wire Debug ................................................................................ 46
Packaging and Temperature .......................................................................................... 47
Hardware Details .......................................................................................................... 47
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
2.5.3
2.5.4
The Cortex-M3 Processor ...................................................................................... 48
Block Diagram .............................................................................................................. 49
Overview ...................................................................................................................... 50
System-Level Interface .................................................................................................. 50
Integrated Configurable Debug ...................................................................................... 50
Trace Port Interface Unit (TPIU) ..................................................................................... 51
Cortex-M3 System Component Details ........................................................................... 51
Programming Model ...................................................................................................... 52
Processor Mode and Privilege Levels for Software Execution ........................................... 52
Stacks .......................................................................................................................... 52
Register Map ................................................................................................................ 53
Register Descriptions .................................................................................................... 54
Exceptions and Interrupts .............................................................................................. 67
Data Types ................................................................................................................... 67
Memory Model .............................................................................................................. 67
Memory Regions, Types and Attributes ........................................................................... 69
Memory System Ordering of Memory Accesses .............................................................. 69
Behavior of Memory Accesses ....................................................................................... 69
Software Ordering of Memory Accesses ......................................................................... 70
Bit-Banding ................................................................................................................... 71
Data Storage ................................................................................................................ 73
Synchronization Primitives ............................................................................................. 74
Exception Model ........................................................................................................... 75
Exception States ........................................................................................................... 76
Exception Types ............................................................................................................ 76
Exception Handlers ....................................................................................................... 79
Vector Table .................................................................................................................. 79
July 24, 2012
3
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