TLK3104SA_09 Datasheet, PDF (34/43 Pages) Texas Instruments – QUAD 3.125 Dbps SERIAL TRANSCEIVER

TLK3104SA
QUAD 3.125 Gbps SERIAL TRANSCEIVER
SCAS651B-− AUGUST 2000 − REVISED SEPTEMBER 2001
reference clock electrical characteristics (RFCP/N) over recommended operating conditions
(unless otherwise noted)
PARAMETER
VI
Input voltage
VID
Differential input voltage
CI
Input capacitance
ZI
Input differential impedance
TEST CONDITIONS
at 3.125 Gbps
at 2.5 Gbps
MIN TYP MAX UNIT
825
1675 mV
200
mVp−p
175
mVp−p
3 pF
80 100 120 Ω
LVTTL electrical characteristics over recommended operating conditions (unless otherwise
noted) (see terminal function table for a list of LVTTL signals)
PARAMETER
TEST CONDITIONS
MIN TYP MAX
VOH
VOL
VIH
VIL
IIH
IIL
CI
High-level output voltage
Low-level output voltage
High-level input voltage
Low-level input voltage
High input current
Low input current
Input capacitance
IOH = −400 µA,
IOL = 1 mA,
VDD = MIN
VDD = MIN
VIN = 2 V,
VIN = 0.4 V,
VDD = MAX
VDD = MAX
2.1
VDD
0 0.25 0.6
2
0.8
40
−600
4
SSTL_2 CLass 1 signals (see terminal function table for a list of SSTL_2 Class 1 signals)
(see Note 3)
UNIT
V
V
V
V
µA
µA
pF
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
VOH(dc) High-level output voltage Without line termination, See Note 3
1.57 V(DDQ) −0.1 V(DDQ) −0.1 V
VOL(dc) Low-level output voltage Without line termination, See Note 3
0.04
0.1 V
VIH(dc) High-level dc input voltage DC input, logic high
V(REF)+0.18
V(DDQ)+0.3 V
VIL(dc) Low-level dc input voltage DC input, logic low
−0.30
V(REF)−0.18 V
VIH(ac) High-level ac input voltage AC input, logic high
V(REF)+0.35
V
VIL(ac) Low-level ac input voltage AC input, logic low
V(REF)−0.35 V
IOH(dc) High output current
V(DDQ) = 2.3 V, VO = V(DDQ) − 0.62 V
−7.6
mA
VOL(dc) Low output current
V(DDQ) = 2.3 V, VO = 0.54 V
7.6
mA
CI
Input capacitance
4 pF
NOTE 3: See Figure 26, for more information on SSTL_2 CLASS 1 specifications and test conditions, refer to EIA/JEDEC, Stub Series
Terminated Logic for 2.5 V (SSTL_2), EIA/JESD8−9A, Dec 2000.
1.8V HSTL signals (see terminal function table for a list of 1.8V HSTL signals)
VOH(dc)
VOL(dc)
VIH(dc)
VIL(dc)
VIH(ac)
VIL(ac)
IOH(dc)
IOL(dc)
CI
PARAMETER
High-level output voltage
Low-level output voltage
High-level dc input voltage
Low-level dc input voltage
High-level ac input voltage
Low-level ac input voltage
High output current
Low output current
Input capacitance
TEST CONDITIONS
MIN TYP
MAX UNIT
V(DDQ)−0.4
V(DDQ) V
0.40 V
DC input, logic high
DC input, logic low
AC input, logic high
AC input, logic low
V(DDQ) = 1.8 V
V(DDQ) = 1.8 V
Vref+0.1
−0.30
V(REF)+0.2
−8
8
V(DDQ)+0.3 V
V(REF)−0.1 V
V
V(REF)−0.2 V
mA
mA
4 pF
34
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