TLK3104SA_09 Datasheet, PDF (21/43 Pages) Texas Instruments – QUAD 3.125 Dbps SERIAL TRANSCEIVER

TLK3104SA
QUAD 3.125 Gbps SERIAL TRANSCEIVER
SCAS651B-− AUGUST 2000 − REVISED SEPTEMBER 2001
Writing to register 16 overwrites any previous settings to registers 17−20.
Table 15. Global Configuration Register Bit Definitions (Register 16)
(see registers 17−20 for individual channel configurations)
BIT(s)
NAME
DESCRIPTION
READ/WRITE
16.15:11 Reserved
Read returns 0, write is ignored.
Read only
16.10:9 Multifunction pin output
Multifunction (MF[A-D]) pin configuration
16.10 16.9 Output
00
HSTL=1, SSTL_2 = 0 (default)
01
1 = Comma detected, 0 = data.
10
Register bits 22.3:0 (LOS)
11
Register bits 22.7:4 (PRBS Pass)
Read/Write
16.8
Loss of signal detection
1 = Enable loss of signal condition described in Table 5 for all channels (default).
0 = Disable this function.
Read/Write
Configuration bits (see Table 8), default value = 0.
16.7
Configuration: CONFIG1
When CONFIG1 = low, this bit can be set to 1.
When CONFIG1 = high, this bit is read only.
Logically ORed with external input CONFIG1
Read/Write
Configuration bits (see Table 8), default value = 0
16.6
Configuration: CONFIG0
When CONFIG0 = low, this bit can be set to 1.
When CONFIG0 = high, this bit is read only.
Logically ORed with external input CONFIG0
Read/Write
16.5 Preemphasis: PRE2
Programmable preemphasis control (see Table 7), default value = 0
Read/Write
16.4 Preemphasis: PRE1
Programmable preemphasis control (see Table 7), default value = 0
Read/Write
16.3 Reserved
Read returns 0, write is ignored.
Read only
16.2 PRBS enable
1 = Enable pseudo-random bit stream internal generation and verification on all
channels
0 = Normal operation (default).
When PRBSEN = low, this bit can be set to 1.
When PRBSEN = high, this bit is read only.
Logically ORed with PRBSEN
Read/Write
16.1 Comma detect enable
1 = Enable K28.5 code detection and bit alignment on all channels (default).
0 = Disable K28.5 code detection on all channels.
Logically ANDed with SYNCEN
Read/Write
16.0 Reserved
Read returns 0, write is ignored.
Read/Write
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