TLK3104SA_09 Datasheet, PDF (1/43 Pages) Texas Instruments – QUAD 3.125 Dbps SERIAL TRANSCEIVER

TLK3104SA
QUAD 3.125 Gbps SERIAL TRANSCEIVER
D Quad 3.125 Gbps per Channel Transceiver
Providing 10 Gbps Data Throughput
D Selectable Synchronized or Independent
Channel Operation
D Selectable Transmitter Only, Receiver Only,
or Transceiver Functions
D Selectable On-Chip 8-Bit/10-Bit Encoding/
Decoding (ENDEC)
D Supports IEEE 802.3ae Proposed XGMII
Parallel Interface
D Supports IEEE 802.3ae Proposed XAUI
Serial Interface
D Receiver Differential Input Thresholds
200-mV
D On-Chip 100-Ω Differential Receiver
Termination
D No External Filter Capacitors Required
SCAS651B-− AUGUST 2000 − REVISED SEPTEMBER 2001
D PECL-Compatible Differential Signaling
Serial Interface Using Voltage Mode Logic
(VML) Driver
D Auto-Selects Between 1.8-V HSTL or
SSTL_2 Class 1 I/O With On-Chip 50-Ω
Series Termination on Outputs
D Able to Operate With a Single 2.5-V Power
Supply
D On-Chip Pseudo-Random Bit Stream
(PRBS) Generation and Verification for
Self-Test
D IEEE 802.3 Management Data Input/Output
(MDIO) Interface
D IEEE 1149.1 JTAG Test Interface
D Hot Plug Protection
D Mainstream 250 nm CMOS Technology
D Small Footprint 19×19 mm 289 Ball PBGA
Package
description
The TLK3104SA is a flexible four-channel serial backplane transceiver, delivering high-speed bidirectional
point-to-point data transmissions to provide up to 10 Gbps of full duplex data transmission capacity. The
TLK3104SA supports a broad operating range of serial data rates from 2.5 Gbps to 3.125 Gbps. The primary
application of this device is to provide building blocks for developing point-to-point baseband data transmission
over controlled impedance media of approximately 50 Ω. The transmission media can be printed-circuit-board
traces, copper cables or fiber-optical media. The ultimate rate and distance of data transfer is dependent upon
the attenuation characteristics of the media and the noise coupling into the lines.
The TLK3104SA performs the parallel-to-serial, serial-to-parallel conversion, and clock extraction functions for
a physical layer interface. The TLK3104SA also provides a selectable 8-bit/10-bit (8b/10b) encode/decode
function. The serial transmitter and receiver is implemented using differential pseudo-emitter coupled logic
(PECL) compatible signaling called voltage mode logic (VML) that eliminates the need for external components.
The four transceivers in the TLK3104SA can be configured as either four separate links, or synchronized
together as a single data path. The TLK3104SA supports both the 32-bit data path, 4-bit control, 10 gigabit
media independent interface (XGMII) and the extended auxiliary unit interface (XAUI) currently proposed in the
IEEE 802.3ae 10 gigabit ethernet task force. Figure 1 shows an example system block diagram for the
TLK3104SA used as an XGMII extended sublayer (XGXS) device to provide an additional trace distance on
PCB for data being transferred between the switching fabric and optical transceiver modules.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2001, Texas Instruments Incorporated
1