CC2510FX Datasheet, PDF (232/244 Pages) List of Unclassifed Manufacturers – True System-on-Chip with Low Power RF Transceiver and 8051 MCU

C2510Fx / CC2511Fx
17 Register Overview
MPAGE (0x93) – Memory Page Select .................................................................................. 51
MEMCTR (0xC7) – Memory Arbiter Control........................................................................ 51
DPH0 (0x83) – Data Pointer 0 High Byte............................................................................... 52
DPL0 (0x82) – Data Pointer 0 Low Byte................................................................................ 52
DPH1 (0x85) – Data Pointer 1 High Byte............................................................................... 52
DPL1 (0x84) – Data Pointer 1 Low Byte................................................................................ 52
DPS (0x92) – Data Pointer Select ........................................................................................... 52
PSW (0xD0) – Program Status Word...................................................................................... 53
ACC (0xE0) – Accumulator.................................................................................................... 53
B (0xF0) – B Register ............................................................................................................. 53
SP (0x81) – Stack Pointer ....................................................................................................... 54
IEN1 (0xB8) – Interrupt Enable 1 Register............................................................................. 61
IEN2 (0x9A) – Interrupt Enable 2 Register ............................................................................ 62
TCON (0x88) – CPU Interrupt Flag 1..................................................................................... 63
S0CON (0x98) – CPU Interrupt Flag 2................................................................................... 64
S1CON (0x9B) – CPU Interrupt Flag 3 .................................................................................. 64
IRCON (0xC0) – CPU Interrupt Flag 4 .................................................................................. 65
IRCON2 (0xE8) – CPU Interrupt Flag 5................................................................................. 66
IP1 (0xB9) – Interrupt Priority 1............................................................................................. 66
IP0 (0xA9) – Interrupt Priority 0............................................................................................. 67
PCON (0x87) – Power Mode Control..................................................................................... 76
SLEEP (0xBE) – Sleep Mode Control ................................................................................... 77
CLKCON (0xC6) – Clock Control ........................................................................................ 80
FCTL (0xAE) – Flash Control ................................................................................................ 87
FWDATA (0xAF) – Flash Write Data.................................................................................... 87
FADDRH (0xAD) – Flash Address High Byte....................................................................... 87
FADDRL (0xAC) – Flash Address Low Byte ........................................................................ 87
FWT (0xAB) – Flash Write Timing........................................................................................ 87
P0 (0x80) – Port 0 ................................................................................................................... 93
P1 (0x90) – Port 1 ................................................................................................................... 93
P2 (0xA0) – Port 2 .................................................................................................................. 93
PERCFG (0xF1) – Peripheral Control .................................................................................... 93
ADCCFG (0xF2) – ADC Input Configuration........................................................................ 94
P0SEL (0xF3) – Port 0 Function Select .................................................................................. 94
P1SEL (0xF4) – Port 1 Function Select .................................................................................. 94
P2SEL (0xF5) – Port 2 Function Select .................................................................................. 95
P0DIR (0xFD) – Port 0 Direction ........................................................................................... 95
P1DIR (0xFE) – Port 1 Direction............................................................................................ 95
P2DIR (0xFF) – Port 2 Direction ............................................................................................ 96
P0INP (0x8F) – Port 0 Input Mode ......................................................................................... 96
P1INP (0xF6) – Port 1 Input Mode ......................................................................................... 96
P2INP (0xF7) – Port 2 Input Mode ......................................................................................... 96
P0IFG (0x89) – Port 0 Interrupt Status Flag ........................................................................... 97
P1IFG (0x8A) – Port 1 Interrupt Status Flag .......................................................................... 97
P2IFG (0x8B) – Port 2 Interrupt Status Flag........................................................................... 97
PICTL (0x8C) – Port Interrupt Control................................................................................... 98
P1IEN (0x8D) – Port 1 Interrupt Mask ................................................................................... 98
DMAARM (0xD6) – DMA Channel Arm ............................................................................ 108
DMAREQ (0xD7) – DMA Channel Start Request and Status.............................................. 109
DMA0CFGH (0xD5) – DMA Channel 0 Configuration Address High Byte ....................... 109
DMA0CFGL (0xD4) – DMA Channel 0 Configuration Address Low Byte ........................ 109
DMA1CFGH (0xD3) – DMA Channel 1-4 Configuration Address High Byte.................... 109
DMA1CFGL (0xD2) – DMA Channel 1-4 Configuration Address Low Byte..................... 109
SWRS055D
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