CC2510FX Datasheet, PDF (10/244 Pages) List of Unclassifed Manufacturers – True System-on-Chip with Low Power RF Transceiver and 8051 MCU

C2510Fx / CC2511Fx
7 Electrical Specifications
7.1 Current Consumption
T_A = 25 °C, VDD = 3.0 V if nothing else stated. All measurement results are obtained using the
CC2510EM reference design ([1]).
Parameter
Min Typ Max Unit Condition
Active mode, full
4.8
speed (high speed
crystal oscillator)¹.
4.6
Low CPU activity.
mA System clock running at 26 MHz.
mA System clock running at 24 MHz.
Digital regulator on. High speed crystal oscillator and low power
RCOSC running. No peripherals running.
Low CPU activity: No flash access (i.e. only cache hit), no RAM
access
Active mode, full
2.5
speed (HS
RCOSC)¹.
Low CPU activity.
mA System clock running at 26 MHz.
Digital regulator on. HS RCOSC and low power RCOSC running.
System clock running at 13 MHz. No peripherals running.
Low CPU activity: No flash access (i.e. only cache hit), no RAM
access
Active mode with
radio in RX
Digital regulator on. High speed crystal oscillator and low power
RCOSC running. Radio in RX mode (sensitivity optimized
MDMCFG2.DEM_DCFILT_OFF=0)
19.8
mA 2.4 kBaud, input at sensitivity limit, system clock running at 26 MHz.
17.1
mA 2.4 kBaud, input at sensitivity limit, system clock running at 203 kHz.
19.8
mA 2.4 kBaud, input well above sensitivity limit, system clock running at
26 MHz.
21.5
mA 10 kBaud, input at sensitivity limit, system clock running at 26 MHz.
18.8
mA 10 kBaud, input at sensitivity limit, system clock running at 203 kHz.
19.0
mA 10 kBaud, input well above sensitivity limit, system clock running at
26 MHz.
22.9
mA 250 kBaud, input at sensitivity limit, system clock running at 26 MHz.
20.5
mA 250 kBaud, input at sensitivity limit, system clock running at 1.625
MHz.
19.6
mA 250 kBaud, input well above sensitivity limit, system clock running at
26 MHz. See Figure 2 for typical variation over operating conditions
19.7
mA 500 kBaud, input at sensitivity limit, system clock running at 26 MHz.
17.5
mA 500 kBaud, input at sensitivity limit, system clock running at 3.25
MHz.
16.7
mA 500 kBaud, input well above sensitivity limit
Digital regulator on. High speed crystal oscillator and low power
RCOSC running. Radio in RX mode (current optimized
MDMCFG2.DEM_DCFILT_OFF=1)
17.4
mA 2.4 kBaud, input at sensitivity limit, system clock running at 26 MHz.
14.7
mA 2.4 kBaud, input at sensitivity limit, system clock running at 203 kHz.
17.4
mA 2.4 kBaud, input well above sensitivity limit, system clock running at
26 MHz.
19.4
mA 10 kBaud, input at sensitivity limit, system clock running at 26 MHz.
15.7
mA 10 kBaud, input at sensitivity limit, system clock running at 203 kHz.
16.9
mA 10 kBaud, input well above sensitivity limit, system clock running at
26 MHz.
1 _{Note: In order to reduce the current consumption in active mode, the clock speed can be reduced by}
setting CLKCON.CLKSPD ≠ 000 (see section 13.1 for details). Figure 1 shows typical current
consumption in active mode for different clock speeds
SWRS055D
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