CC2510FX Datasheet, PDF (180/244 Pages) List of Unclassifed Manufacturers – True System-on-Chip with Low Power RF Transceiver and 8051 MCU

C2510Fx / CC2511Fx
0xDE00: USBADDR – Function Address
Bit Field Name
Reset R/W Description
7 UPDATE
0
R
This bit is set when the USBADDR register is written and cleared when the
address becomes effective.
6:0 USBADDR[6:0] 0x00 R/W Device address
0xDE01: USBPOW – Power/Control Register
Bit Field Name
Reset R/W Description
7 ISO_WAIT_SOF 0
6:4
-
3 RST
0
2 RESUME
0
1 SUSPEND
0
0 SUSPEND_EN 0
R/W When this bit is set to 1, the USB controller will send zero length data packets
from the time INPKT_RDY is asserted and until the first SOF token has been
received. This only applies to isochronous endpoints.
R0
Not used
R
During reset signaling, this bit is set to1
R/W Drive resume signaling for remote wakeup. According to the USB Specification
the duration of driving resume must be at least 1 ms and no more than 15 ms.
It is recommended to keep this bit set for approximately 10 ms.
R
Suspend mode entered. This bit will only be used when SUSPEND_EN=1.
Reading the USBCIF register or asserting RESUME will clear this bit.
R/W Suspend Enable. When this bit is set to 1, suspend mode will be entered when
USB bus has been idle for 3 ms.
0xDE02: USBIIF – IN Endpoints and EP0 Interrupt Flags
Bit Field Name
Reset R/W Description
7:6
5 INEP5IF
4 INEP4IF
3 INEP3IF
2 INEP2IF
1 INEP1IF
0 EP0IF
-
R0
Not used
0
R, H0 Interrupt flag for IN endpoint 5. Cleared by HW when read
0
R, H0 Interrupt flag for IN endpoint 4. Cleared by HW when read
0
R, H0 Interrupt flag for IN endpoint 3. Cleared by HW when read
0
R, H0 Interrupt flag for IN endpoint 2. Cleared by HW when read
0
R, H0 Interrupt flag for IN endpoint 1. Cleared by HW when read
0
R, H0 Interrupt flag for endpoint 0. Cleared by HW when read
0xDE04: USBOIF – Out Endpoints Interrupt Flags
Bit Field Name
Reset R/W Description
7:6
-
5 OUTEP5IF
0
4 OUTEP4IF
0
3 OUTEP3IF
0
2 OUTEP2IF
0
1 OUTEP1IF
0
0
-
R0
R, H0
R, H0
R, H0
R, H0
R, H0
R0
Not used
Interrupt flag for OUT endpoint 5. Cleared by HW when read
Interrupt flag for OUT endpoint 4. Cleared by HW when read
Interrupt flag for OUT endpoint 3. Cleared by HW when read
Interrupt flag for OUT endpoint 2. Cleared by HW when read
Interrupt flag for OUT endpoint 1. Cleared by HW when read
Not used
SWRS055D
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