CC2510FX Datasheet, PDF (121/244 Pages) List of Unclassifed Manufacturers – True System-on-Chip with Low Power RF Transceiver and 8051 MCU

C2510Fx / CC2511Fx
T1CCTL1 (0xE6) – Timer 1 Channel 1 Capture/Compare Control
Bit Name
7
CPSEL
6
IM
5:3 CMP[2:0]
2
MODE
1:0 CAP[1:0]
Reset
0
1
000
0
00
R/W
R/W
R/W
R/W
R/W
R/W
Description
Timer 1 channel 1 capture select
0
Use normal capture input
1
Use RF event(s) enabled in the RFIM register to trigger a capture
Channel 1 interrupt mask
0
Interrupt disabled
1
Interrupt enabled
Channel 1 compare mode select. Selects action on output when timer value equals
compare value in T1CC1
000 Set output on compare
001 Clear output on compare
010 Toggle output on compare
011 Set output on compare-up, clear on 0 (clear on compare-down in up/down
mode)
100 Clear output on compare-up, set on 0 (set on compare-down in up/down
mode)
101 Set when equal to T1CC1, clear when equal to T1CC0
110 Clear when equal to T1CC1, set when equal to T1CC0
111 DSM mode enable
CMP ≠ 111
CMP = 111
Select Timer 1 channel 1 capture
or compare mode
Set the DSM speed
0
Capture mode
1/8 of timer tick speed
1
Compare mode
1/2 of timer tick speed
Channel 1 capture mode
select (timer mode)
DSM interpolator and output shaping
configuration (DSM mode)
00 No capture
DSM interpolator and output shaping
enabled
01 Capture on rising edge
DSM interpolator enabled and output
shaping disabled
10 Capture on falling edge
DSM interpolator disabled and output
shaping enabled
11 Capture on both edges
DSM interpolator and output shaping
disabled
T1CC1H (0xDD) – Timer 1 Channel 1 Capture/Compare Value High
Bit Name
Reset R/W Description
7:0 T1CC1[15:8] 0x00 R/W Timer 1 channel 1 capture/compare value, high order byte
DSM data high order byte (DSM mode)
T1CC1L (0xDC) – Timer 1 Channel 1 Capture/Compare Value Low
Bit Name
Reset R/W Description
7:0 T1CC1[7:0] 0x00 R/W Timer 1 channel 1 capture/compare value, low order byte
DSM data low order byte. The two least significant bits are not used. (DSM mode)
SWRS055D
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