CC2510FX Datasheet, PDF (213/244 Pages) List of Unclassifed Manufacturers – True System-on-Chip with Low Power RF Transceiver and 8051 MCU

C2510Fx / CC2511Fx
14.18 Radio Registers
This Section describes all RF registers used for control and status for the radio.
0xDF2F: IOCFG2 – Radio Test Signal Configuration (P1_7)
Bit Field Name
Reset
R/W Description
7
6 GDO2_INV
5:0 GDO2_CFG[5:0]
-
0
000000
R0 Not used
R/W Invert output, i.e. select active low (1) / high (0)
R/W Debug output on P1_7 pin. See Table 73 for a
description of internal signals which can be output on
this pin for debug purpose
0xDF30: IOCFG1 – Radio Test Signal Configuration (P1_6)
Bit Field Name
Reset
R/W Description
7 GDO_DS
6 GDO1_INV
5:0 GDO1_CFG[5:0]
0
0
000000
R/W Enable / disable drive strength enhancement for all port
outputs. To be used below 2.6 V
0 Disable
1 Enable
R/W Invert output
0 Active high
1 Active low
R/W Debug output on P1_6 pin. See Table 73 for a
description of internal signals which can be output on
this pin for debug purpose
0xDF31: IOCFG0 – Radio Test Signal Configuration (P1_5)
Bit Field Name
Reset
R/W Description
7
6 GDO0_INV
5:0 GDO0_CFG[5:0]
-
0
000000
R0 Not used
R/W Invert output, i.e. select active low (1) / high (0)
R/W Debug output on P1_5 pin. See Table 73 for a
description of internal signals which can be output on
this pin for debug purpose.
0xDF00: SYNC1 – Sync Word, High Byte
Bit Field Name
Reset
7:0 SYNC[15:8]
0xD3
R/W Description
R/W 8 MSB of 16-bit sync word
0xDF01: SYNC0 – Sync Word, Low Byte
Bit Field Name
Reset
7:0 SYNC[7:0]
0x91
R/W Description
R/W 8 LSB of 16-bit sync word
0xDF02: PKTLEN – Packet Length
Bit Field Name
Reset
7:0 PACKET_LENGTH
0xFF
R/W Description
R/W Indicates the packet length when fixed length packets
are enabled. If variable length packets are used, this
value indicates the maximum length packets allowed
SWRS055D
Page 213 of 243