STE10 Datasheet, PDF (53/66 Pages) STMicroelectronics – PCI 10/100 ETHERNET CONTROLLER WITH INTEGRATED PHY 5V

STE10/100
s 2 Octets of PAUSE time specified in the MAC Control parameter field to indicate the length of time
for which the destination is requested to inhibit data frame transmission.
s Receive Operation for PAUSE function
Upon reception of a valid MAC Control frame, the STE10/100 will start a timer for the length of time
specified by the MAC Control Parameters field. When the timer value reaches zero, the STE10/100
exits the PAUSE state. However, a PAUSE frame will not affect the transmission of a frame that has
been submitted to the MAC (i.e., once a transmit out of the MAC is begun, it can’t be interrupted).
Conversely, the STE10/100 will not begin to transmit a frame more than one slot-time after valid PAUSE
frame is received a with a non-zero PAUSE time. If the STE10/100 receives a PAUSE frame with a zero
PAUSE time value, the STE10/100 exits the PAUSE state immediately.
Figure 15. PAUSE operation receive state diagram
Opcode = PAUSE Function
Wait for Transmission Completed
transmission_in_progress = false *
DA = (01-80-C2-00-00-01 + Phys-address)
DA ≠ (01-80-C2-00-00-01 + Phys-address)
PAUSE FUNCTION
n_slots_rx = data [17:32]
Start pause_timer (n_slots_rx * slot_time)
UCT
END PAUSE
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