STE10 Datasheet, PDF (28/66 Pages) STMicroelectronics – PCI 10/100 ETHERNET CONTROLLER WITH INTEGRATED PHY 5V

STE10/100
Table 6. Control/Status register description
Bit #
Name
Descriptions
Default Val RW Type
5
PAUSE Disable or enable the PAUSE function for flow control. The
Depends
R/W
default value of PAUSE is determined by the result of Auto-
on the
Negotiation. The driver software can overwrite this bit to
result of
enable or disable it after the Auto-Negotiation has completed.
Auto-
0: PAUSE function is disabled.
Negotiation
1: PAUSE function is enabled
4
RTE Receive Threshold Enable.
0
R/W
1: the receive FIFO threshold is enabled.
0: disable the receive FIFO threshold selection in DRT (bits
3~2), and the receive threshold is set to the default 64 bytes.
3~2
DRT Drain Receive Threshold
00: 32 bytes (8 DW)
01: 64 bytes (16 DW)
10: store-and -forward
11: reserved
01
R/W
1
SINT Software interrupt.
0
R/W
0
ATUR 1: enable automatically transmit-underrun recovery.
0
R/W
CSR19(offset = 8ch) - PCIC, PCI bus performance counter
31~16
CLKCNT The number of PCI clocks from read request asserted to
0
RO*
access completed. This PCI clock count is accumulated for all
the read command cycles from the last CSR19 read to the
current CSR19 read.
15~8
---
reserved
7~0
DWCNT The number of double words accessed by the last bus master.
0
RO*
This double word count is accumulated for all bus master data
transactions from the last CSR19 read to the current CSR19
read.
RO* = Read only and cleared by reading.
CSR20 (offset = 90h) - PMCSR, Power Management Command and Status (The same register value mapping to
CR49-PMR1.)
31~16
---
reserved
15
PMES PME_Status. This bit is set whenever the STE10/100 detects
0
RO
a wake-up event, regardless of the state of the PME-En bit.
Writing a “1” to this bit will clear it, causing the STE10/100 to
deassert PME# (if so enabled). Writing a “0” has no effect.
14,13
DSCAL Data_Scale. Indicates the scaling factor to be used when
00b
RO
interpreting the value of the Data register. This field is
required for any function that implements the Data register.
The STE10/100 does not support Data register and
Data_Scale.
12~9
DSEL Data_Select. This four bit field is used to select which data is 0000b
RO
to be reported through the Data register and Data_Scale field.
This field is required for any function that implements the Data
register.
The STE10/100 does not support Data_select.
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