STE10 Datasheet, PDF (44/66 Pages) STMicroelectronics – PCI 10/100 ETHERNET CONTROLLER WITH INTEGRATED PHY 5V

STE10/100
6.2.2 Descriptor Management
OWN bit = 1, ready for network side access
OWN bit = 0, ready for host side access
s Transmit Descriptors
Figure 7. Transmit descriptor management
Descriptor Ring
next packet to be transmitted
own bit=1,
Packet 1 and packet 2
are ready to transmit
0
Length 2 Length 1
Buffer 1 pointer
Buffer 2 pointer
1
packet1
1
packet1
empty descriptor pointer
1
packet2
0
•
•
•
end of ring
0
Data Buffer
data
data
44/66