LSM6DB0 Datasheet, PDF (30/66 Pages) STMicroelectronics – 3D accelerometer, 3D gyroscope and signal processor

Microprocessor functionality
8
Microprocessor functionality
LSM6DB0
8.1
8.1.1
ARM Cortex-M0 core
The ARM Cortex-M0 processor is a very low gate count, energy-efficient processor. It has
been developed to provide an energy-efficient processor for microcontrollers and embedded
applications requiring an area-optimized processor. The ARM Cortex-M0 32-bit RISC
processor uses Thumb-2^® technology, providing a blend of 16/32-bit instructions delivering
a smaller code size to 8-bit and 16-bit architectures.
Owing to its embedded ARM core, the LSM6DB0 is compatible with all ARM tools and
software.
Nested vectored interrupt controller (NVIC)
The ARM Cortex-M0 processor supports up to 32 interrupt requests (IRQ), a non-maskable
interrupt (NMI), and various system exceptions. The NVIC and the ARM Cortex-M0
processor core are closely coupled and provide:
– Low-latency interrupt processing
– Four interrupt priority levels
– Efficient processing of late-arriving interrupts and higher priority interrupts
– Support for tail-chaining
8.2
Power supply scheme
– VDD^(c) = 1.8 V to 3.3 V: external power supply for master serial port (DIO6 to DIO10).
Provided through VDD pin.
– VDD1.8^(c) = 1.8 V: external power supply for internal regulator. Provided through
VDD1.8 pin.
The LSM6DB0 integrates an LDO regulator which is used to generate the power supply for
the internal digital circuitry. The LDO supplies 1.2 V for the digital blocks and requires a
decoupling capacitor for stable operation.
Figure 14. LSM6DB0 digital power supply generation
VDD1.8 (pin#1)
1.8 V supply
LDO
digital logic
1.2V
LDO1.2 (pin#13)
GND (pin#12)
220 nF
External decoupling
capacitor
GND
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c. For minimum and maximum operating conditions of VDD and VDD1.8 refer to Table 5.
DocID025603 Rev 1