LAN9117_08 Datasheet, PDF (85/136 Pages) SMSC Corporation – High Performance Single-Chip 10/100 Non-PCI Ethernet Controller

High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
5.3.12 TX_FIFO_INF—Transmit FIFO Information Register
Offset:
80h
Size:
32 bits
This register contains the free space in the transmit data FIFO and the used space in the transmit
status FIFO in the LAN9117.
BITS DESCRIPTION
31-24 Reserved
23-16
15-0
TX Status FIFO Used Space (TXSUSED). Indicates the amount of space
in DWORDS used in the TX Status FIFO.
TX Data FIFO Free Space (TDFREE). Reads the amount of space in bytes,
available in the TX data FIFO. The application should never write more data
than is available, as indicated by this value.
TYPE
RO
RO
RO
DEFAULT
-
00h
1200h
SMSC LAN9117
85
DATASHEET
Revision 1.5 (07-11-08)