LAN9117_08 Datasheet, PDF (119/136 Pages) SMSC Corporation – High Performance Single-Chip 10/100 Non-PCI Ethernet Controller

High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Table 6.1 Read After Write Timing Rules
REGISTER NAME
ID_REV
IRQ_CFG
INT_STS
INT_EN
BYTE_TEST
FIFO_INT
RX_CFG
TX_CFG
HW_CFG
RX_DP_CTRL
RX_FIFO_INF
TX_FIFO_INF
PMT_CTRL
GPIO_CFG
GPT_CFG
GPT_CNT
WORD_SWAP
FREE_RUN
RX_DROP
MAC_CSR_CMD
MAC_CSR_DATA
AFC_CFG
E2P_CMD
E2P_DATA
MINIMUM WAIT TIME FOR READ
FOLLOWING ANY WRITE CYCLE
(IN NS)
0
135
90
45
0
45
45
45
45
45
0
135
315
45
45
135
45
180
0
45
45
45
45
45
NUMBER OF BYTE_TEST
READS
(ASSUMING T_CYCLE OF 45NS)
0
3
2
1
0
1
1
1
1
1
0
3
7
1
1
3
1
4
0
1
1
1
1
1
SMSC LAN9117
119
DATASHEET
Revision 1.5 (07-11-08)