SAB80515 Datasheet, PDF (81/270 Pages) Siemens Semiconductor Group – 8-Bit Single-Chip Microcontroller Family

On-Chip Peripheral Components
Conversion time (t_C):
The conversion time t_C includes the sample and load time. Thus, t_C is the total time required for one
conversion. After the load time and sample time have elapsed, the conversion itself is performed
during the rest of t_C. In the last machine cycle the converted result is moved to ADDAT; the busy
flag (BSY) is cleared before. The A/D converter interrupt is generated by bit IADC in register
IRCON. IADC is already set some cycles before the result is written to ADDAT. The flag IADC is
set before the result is available in ADDAT because the shortest possible interrupt latency time is
taken into account in order to ensure optimal performance. Thus, the converted result appears at
the same time in ADDAT when the first instruction of the interrupt service routine is executed.
Similar considerations apply to the timing of the flag BSY where usually a "JB BSY,$" instruction is
used for polling.
lf a continuous conversion is established, the next conversion is automatically started in the
machine cycle following the last cycle of the previous conversion.
Figure 7-32
Timing Diagram of an A/D Converter
Semiconductor Group
81