SAB80515 Datasheet, PDF (245/270 Pages) Siemens Semiconductor Group – 8-Bit Single-Chip Microcontroller Family

Device Specifications
If all timers are stopped and the A/D converter and the serial interface are not running, the
maximum power reduction can be achieved. This state is also the test condition for the idle
mode I_CC (see DC characteristics, note 5).
So the user has to take care which peripheral should continue to run and which has to be
stopped during idle mode. Also the state of all port pins – either the pins controlled by their
latches or controlled by their secondary functions – depends on the status of the controller
when entering idle mode.
Normally the port pins hold the logical state they had at the time idle mode was activated. If
some pins are programmed to serve their alternate functions they still continue to output during
idle mode if the assigned function is on. This applies to the compare outputs as well as to the
clock output signal or to the serial interface in case it cannot finish reception or transmission
during normal operation. The control signals ALE and PSEN hold at logic high levels (see
table 5).
Table 5
Status of External Pins During Idle and Power-Down Mode
Last instruction executed from
internal code memory
Last instruction executed from
external code memory
Outputs
ALE
Idle
High
Power-down
Low
Idle
High
Power-down
Low
PSEN
High
Low
High
Low
PORT 0
PORT 1
PORT 2
Data
Data/alternate
outputs
Data
Data
Data/last
output
Data
Float
Data/alternate
outputs
Address
Float
Data/last
output
Data
PORT 3
Data/alternate
outputs
Data/last
output
Data/alternate
outputs
Data/last
output
PORT 4
Data
Data
Data
Data
PORT 5
Data
Data
Data
Data
As in normal operation mode, the ports can be used as inputs during idle mode. Thus a capture
or reload operation can be triggered, the timers can be used to count external events, and
external interrupts will be detected.
The idle mode is a useful feature which makes it possible to "freeze" the processor's status –
either for a predefined time, or until an external event reverts the controller to normal operation,
as discussed below. The watchdog timer is the only peripheral which is automatically stopped
during idle mode. If it were not disabled on entering idle mode, the watchdog timer would reset
the controller, thus abandoning the idle mode.
Semiconductor Group
245