SAB80515 Datasheet, PDF (57/270 Pages) Siemens Semiconductor Group – 8-Bit Single-Chip Microcontroller Family

On-Chip Peripheral Components
7.2.4.3 Mode 2, 9-Bit UART
Mode 2 is functionally identical to mode 3 (see below). The only exception is, that in mode 2 the
baud rate can be programmed to two fixed quantities: either 1/32 or 1/64 of the oscillator frequency.
In mode 3 the baud rate clock is generated by timer 1, which is incremented by a rate of f_OSC/12 or
by the internal baud rate generator.
7.2.4.4 Mode 3, 9-Bit UART
Eleven bits are transmitted (through TxD), or received (through RxD): a start bit (0), 8 data bits (LSB
first), a programmable 9th data bit, and a stop bit (1). On transmission, the 9th data bit (TB8) can
be assigned the value of 0 or 1. On reception the 9th data bit goes into RB8 in SCON.
The baud rate is generated by either using timer 1 or the internal baud rate generator (see section
7.2.3).
Figures 7-18 a) and b) show a functional diagram of the serial interfaces in mode 2 and 3 and
associated timing. The receive portion is exactly the same as in mode 1. The transmit portion differs
from mode 1 only in the 9th bit of the transmit shift register.
Transmission is initiated by any instruction that uses SBUF as a destination register. The "write to
SBUF" signal also loads TB8 into the 9th bit position of the transmit shift register and flags the TX
control unit that a transmission is requested. Transmission commences at S1P1 of the machine
cycle following the next rollover in the divide-by-16 counter (thus the bit times are synchronized to
the divide-by-16 counter, and not to the "write-to-SBUF" signal).
The transmission begins with the activation of SEND, which puts the start bit to TxD. One bit time
later, DATA is activated which enables the output bit of transmit shift register to TxD. The first shift
pulse occurs one bit time after that. The first shift clocks a 1 (the stop bit) into the 9th bit position of
the shift register. Thereafter, only zeros are clocked in. Thus, as data shift out to the right, zeros are
clocked in from the left. When TB8 is at the output position of the shift register, then the stop bit is
just left of the TB8, and all positions to the left of that contain zeros.
This condition flags the TX control unit to do one last shift and then deactivate SEND and set TI.
This occurs at the 11th divide-by-16 rollover after "write-to-SBUF".
Reception is initiated by a detected 1-to-0 transition at RxD. For this purpose RxD is sampled of a
rate of 16 times whatever baud rate has been established. When a transition is detected, the divide-
by-16 counter is immediately reset, and 1FH is written to the input shift register.
Semiconductor Group
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