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SAB80515 Datasheet, PDF (80/270 Pages) Siemens Semiconductor Group – 8-Bit Single-Chip Microcontroller Family
On-Chip Peripheral Components
The external reference voltage supply need only be applied when the A/D converter is used,
otherwise the pins VAREF and VAGND may be left unconnected. The reference voltage supply has to
meet some requirements concerning the level of VAGND and VAREF and the output impedance of the
supply voltage (see also "A/D Converter Characteristics" in the data sheet).
– The voltage VAREF must meet the following specification:
VAREF = VCC ± 5 %
– The voltage VAGND must meet a similar specification:
VAGND = VSS ± 0.2 V
– The differential output impedance of the analog reference supply voltage should be less than
1 kΩ
lf the above mentioned operating conditions are not met the accuracy of the converter may be
decreased.
Furthermore, the analog input voltage VAINPUT must not exceed the range from (VAGND – 0.2 V) to
(VAREF + 0.2 V). Otherwise, a static input current might result at the corresponding analog input
which will also affect the accuracy of the other input channels.
7.4.3 A/D Converter Timing
A conversion is started by writing into special function register DAPR. A write-to-DAPR will start a
new conversion even if a conversion is currently in progress. The conversion begins with the next
machine cycle and the busy flag BSY will be set.
The conversion procedure is divided into three parts:
Load time (tL):
During this time the analog input capacitance CI (see data sheet) must be loaded to the analog input
voltage level. The external analog source needs to be strong enough to source the current to load
the analog input capacitance during the load time. This causes some restrictions for the impedance
of the analog source. For a typical application the value of the impedance should be less than
approx. 5 kΩ.
Sample time (tS):
During this time the internal capacitor array is connected to the selected analog input channel. The
sample time includes the load time which is described above. After the load time has passed the
selected analog input must be held constant for the rest of the sample time. Otherwise the internal
calibration of the comparator circuitry could be affected which might result in a reduced accuracy of
the converter. However, in typical applications a voltage change of approx. 200 - 300 mV at the
inputs during this time has no effect.
Semiconductor Group
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