SAB80515 Datasheet, PDF (118/270 Pages) Siemens Semiconductor Group – 8-Bit Single-Chip Microcontroller Family

Interrupt System
The external interrupt 2 (INT2/) can be either positive or negative transition-activated depending
on bit I2FR in register T2CON (see figure 8-5). The flag that actually generates this interrupt is bit
IEX2 in register IRCON. lf an interrupt 2 is generated, flag IEX2 is cleared by hardware when the
service routine is vectored too.
Figure 8-5
Special Function Register T2CON (Address 0C8H)
0CFH 0CEH 0CDH 0CCH 0CBH 0CAH 0C9H 0C8H
0C8H T2PS I3FR I2FR T2R1 T2R0 T2CM T2I1 T2I0 T2CON
These bits are not used for interrupt control.
Bit
I2FR
I3FR
Function
External interrupt 2 falling/rising edge flag. When set, the interrupt 2 request flag
IEX2 will be set on a positive transition at pin P1.4/INT2. I2FR = 0 specifies
external interrupt 2 to be negative-transition activated.
External interrupt 3 falling/rising edge flag. When set, the interrupt 3 request flag
IEX3 will be set on a positive transition at pin P1.0/INT3. I3FR = 0 specifies
external interrupt 3 to be negative-transition active.
Like the external interrupt 2, the external interrupt 3 (INT3) can be either positive or negative
transition-activated, depending on bit I3FR in register T2CON. The flag that actually generates this
interrupt is bit IEX3 in register IRCON. In addition, this flag will be set if a compare event occurs at
pin P1.0/INT3/CC0, regardless of the compare mode established and the transition at the
respective pin. The flag IEX3 is cleared by hardware when the service routine is vectored too.
The external interrupts 4 (INT4), 5 (INT5), 6 (INT6) are positive transition-activated. The flags that
actually generate these interrupts are bits IEX4, IEX5, and IEX6 in register IRCON (see figure 8-6).
In addition, these flags will be set if a compare event occurs at the corresponding output pin P1.1/
INT4/CC1, P1.2/INT5/CC2, and P1.3/INT6/CC3, regardless of the compare mode established and
the transition at the respective pin. When an interrupt is generated, the flag that generated it is
cleared by the on-chip hardware when the service routine is vectored too.
Semiconductor Group
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