SAB80515 Datasheet, PDF (23/270 Pages) Siemens Semiconductor Group – 8-Bit Single-Chip Microcontroller Family

Memory Organization
4.3 General Purpose Register
The lower 32 locations of the internal RAM are assigned to four banks with eight general purpose
register (GPRs) each. Only one of these banks may be enabled at a time. Two bits in the program
status word, PSW.3 and PSW.4, select the active register bank (see description of the PSW). This
allows fast context switching, which is useful when entering subroutines or interrupt service
routines. ASM51 and the device SAB 80(C)515 default to register bank 0.
The 8 general purpose registers of the selected register bank may be accessed by register
addressing. With register addressing the instruction op code indicates which register is to be used.
For indirect accessing R0 and R1 are used as pointer or index register to address internal or
external memory (e.g. MOV @R0).
Reset initializes the stack pointer to location 07H and increments it once to start from location 08H
which is also the first register (R0) of register bank 1. Thus, if one is going to use more than one
register bank, the SP should be initiated to a different location of the RAM which is not used for data
storage.
4.4 Special Function Registers
The Special Function Register (SFR) area has two important functions. Firstly, all CPU register
except the program counter and the four register banks reside here. The CPU registers are the
arithmetic registers like A, B, PSW and pointers like SP, DPH and DPL.
Secondly, a number of registers constitute the interface between the CPU and all on-chip
peripherals. That means, all control and data transfers from and to the peripherals use this register
interface exclusively.
The special function register area is located in the address space above the internal RAM from
addresses 80H to FFH. All 41 special function registers of the SAB 80(C)515 reside here.
Fifteen SFRs, that are located on addresses dividable by eight, are bit-addressable, thus allowing
128 bit-addressable locations within the SFR area.
Since the SFR area is memory mapped, access to the special function registers is as easy as with
internal RAM, and they may be processed with most instructions. In addition, if the special functions
are not used, some of them may be used as general scratch pad registers. Note, however, all SFRs
can be accessed by direct addressing only.
The special function registers are listed in table 4-1. Bit- and byte-addressable special function
registers are marked with an asterisk at the symbol name.
Semiconductor Group
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