SAB80515 Datasheet, PDF (131/270 Pages) Siemens Semiconductor Group – 8-Bit Single-Chip Microcontroller Family

Instruction Set
Subtraction
– SUBB (subtract with borrow) subtracts the second source operand from the the first operand
(the accumulator), subtracts one (1) if CY is set and returns the result to A.
– DEC (decrement) subtracts one (1) from the source operand and returns the result to the
operand.
Multiplication
– MUL performs an unsigned multiplication of the A register, returning a double byte result. A
receives the low-order byte, B receives the high-order byte. OV is cleared if the top half of the
result is zero and is set if it is not zero. CY is cleared. AC is unaffected.
Division
– DIV performs an unsigned division of the A register by the B register; it returns the integer
quotient to the A register and returns the fractional remainder to the B register. Division by
zero leaves indeterminate data in registers A and B and sets OV; otherwise, OV is cleared.
CY is cleared. AC remains unaffected.
Flags
Unless otherwise stated in the previous descriptions, the flags of PSW are affected as follows:
– CY is set if the operation causes a carry to or a borrow from the resulting high-order bit;
otherwise CY is cleared.
– AC is set if the operation results in a carry from the low-order four bits of the result (during
addition), or a borrow from the high-order bits to the low-order bits (during subtraction);
otherwise AC is cleared.
– OV is set if the operation results in a carry to the high-order bit of the result but not a carry
from the bit, or vice versa; otherwise OV is cleared. OV is used in two’s-complement
arithmetic, because it is set when the signal result cannot be represented in 8 bits.
– P is set if the modulo-2 sum of the eight bits in the accumulator is 1 (odd parity); otherwise P
is cleared (even parity). When a value is written to the PSW register, the P bit remains
unchanged, as it always reflects the parity of A.
Semiconductor Group
131