SAB80515 Datasheet, PDF (58/270 Pages) Siemens Semiconductor Group – 8-Bit Single-Chip Microcontroller Family

On-Chip Peripheral Components
At the 7th, 8th and 9th counter state of each bit time, the bit detector samples the value of RxD. The
value accepted is the value that was seen in at least 2 of the 3 samples. lf the value accepted during
the first bit time is not 0, the receive circuits are reset and the unit goes back to looking for another
1-to-0 transition. lf the start bit proves valid, it is shifted into the input shift register, and reception of
the rest of the frame will proceed.
As data bits come from the right, 1 s shift out to the left. When the start bit arrives at the leftmost
position in the shift register (which is a 9-bit register), it flags the RX control block to do one last shift,
load SBUF and RB8, and set RI. The signal to load SBUF and RB8, and to set RI, will be generated
if, and only if, the following conditions are met at the time the final shift pulse is generated:
1) RI = 0, and
2) either SM2 = 0 or the received 9th data bit = 1
lf either one of these two conditions is not met, the received frame is irretrievably lost, and RI is not
set. lf both conditions are met, the received 9th data bit goes into RB8, the first 8 data bits go into
SBUF. One bit time later, no matter whether the above conditions are met or not, the unit goes back
to look for a 1-to-0 transition at the RxD.
Note that the value of the received stop bit is irrelevant to SBUF, RB8, or RI.
Semiconductor Group
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