SAB80515 Datasheet, PDF (65/270 Pages) Siemens Semiconductor Group – 8-Bit Single-Chip Microcontroller Family

On-Chip Peripheral Components
7.3 Timer 0 and Timer 1
The SAB 80(C)515 three general purpose 16-bit timer/counters: timer 0, timer 1, timer 2 and the
compare timer (timer 2 is discussed separately in section 7.5). Timer/counter 0 and 1 are fully
compatible with timer/counters 0 and 1 of the SAB 80(C)51 and can be used in the same operating
modes.
Timer/counter 0 and 1 which are discussed in this section can be configured to operate either as
timers or event counters:
– In "timer" function, the register is incremented every machine cycle. Thus one can think of it
as counting machine cycles. Since a machine cycle consists of 12 oscillator periods, the count
rate is 1/12 of the oscillator frequency.
– In "counter" function, the register is incremented in response to a 1-to-0 transition (falling
edge) at its corresponding external input pin, T0 or T1 (alternate functions of P3.4 and P3.5,
resp.). In this function the external input is sampled during S5P2 of every machine cycle.
When the samples show a high in one cycle and a low in the next cycle, the count is
incremented. The new count value appears in the register during S3P1 of the cycle following
the one in which the transition was detected. Since it takes two machine cycles (24 oscillator
periods) to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator
frequency. There are no restrictions on the duty cycle of the external input signal, but to
ensure that a given level is sampled at least once before it changes, it must be held for at least
one full machine cycle.
In addition to the "timer" and "counter" selection, timer/counters 0 and 1 have four operating modes
from which to select.
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