SAB80515 Datasheet, PDF (31/270 Pages) Siemens Semiconductor Group – 8-Bit Single-Chip Microcontroller Family

System Reset
6
System Reset
6.1 Hardware Reset and Power-Up Reset
6.1.1 Reset Function and Circuitries
The hardware reset function incorporated in the SAB 80(C)515 allows for an easy automatic start-
up at a minimum of additional hardware and forces the controller to a predefined default state. The
hardware reset function can also be used during normal operation in order to restart the device. This
is particularly done when the power-down mode (see section 7.6) is to be terminated.
In addition to the hardware reset, which is applied externally to the SAB 80(C)515, there is also the
possibility of an internal hardware reset. This internal reset will be initiated by the watchdog timer
(section 7.7).
The reset input is an active low input at pin 10 (RESET). An internal Schmitt trigger is used at the
input for noise rejection. Since the reset is synchronized internally, the RESET pin must be held low
for at least two machine cycles (24 oscillator periods) while the oscillator is running. With the
oscillator running the internal reset is executed during the second machine cycle in which RESET
is low and is repeated every cycle until RESET goes high again.
During reset, pins ALE and PSEN are configured as inputs and should not be stimulated externally.
(An external stimulation at these lines during reset activates several test modes which are reserved
for test purposes. This in turn may cause unpredictable output operations at several port pins).
A pullup resistor is internally connected to V_CC to allow a power-up reset with an external capacitor
only. An automatic reset can be obtained when V_CC is applied by connecting the reset pin to V_SS via
a capacitor as shown in figure 6-1 a) and c). After V_CC has been turned on the capacitor must hold
the voltage level at the reset pin for a specified time below the upper threshold of the Schmitt trigger
to effect a complete reset.
The time required is the oscillator start-up time plus 2 machine cycles, which, under normal
conditions, must be at least 10 - 20 ms for a crystal oscillator. This requirement is usually met using
a capacitor of 4.7 to 10 microfarad. The same considerations apply if the reset signal is generated
externally (figure 6-1 b) ). In each case it must be assured that the oscillator has started up properly
and that at least two machine cycles have passed before the reset signal goes inactive.
Semiconductor Group
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