SAB80515 Datasheet, PDF (240/270 Pages) Siemens Semiconductor Group – 8-Bit Single-Chip Microcontroller Family

Device Specifications
Interrupt Structure
The SAB 80C515 has 12 interrupt vectors with the following vector addresses and request
flags:
Table 3
Interrupt Sources and Vectors
Source (Request Flags)
IE0
TF0
IE1
TF1
RI + TI
TF2 + EXF2
IADC
IEX2
IEX3
IEX4
IEX5
IEX6
Vector Address
0003_H
000B_H
0013_H
001B_H
0023_H
002B_H
0043_H
004B_H
0053_H
005B_H
0063_H
006B_H
Vector
External interrupt 0
Timer 0 interrupt
External interrupt 1
Timer 1 interrupt
Serial port interrupt
Timer 2 interrupt
A/D converter interrupt
External interrupt 2
External interrupt 3
External interrupt 4
External interrupt 5
External interrupt 6
Each interrupt vector can be individually enabled/disabled. The minimum response time to an
interrupt request is more than 3 machine cycles and less than 9 machine cycles.
Figure 5 shows the interrupt request sources.
External interrupts 0 and 1 can be activated by a low-level or a negative transition (selectable)
at their corresponding input pin, external interrupts 2 and 3 can be programmed for triggering
on a negative or a positive transition. The external interrupts 3 or 6 are combined with the
corresponding alternate functions compare (output) and capture (input) on port 1.
For programming of the priority levels the interrupt vectors are combined to pairs. Each pair can
be programmed individually to one of four priority levels by setting or clearing one bit in the
special function register IP0 and one in IP1.
Figure 6 shows the priority level structure.
Semiconductor Group
240