SAB80515 Datasheet, PDF (104/270 Pages) Siemens Semiconductor Group – 8-Bit Single-Chip Microcontroller Family

On-Chip Peripheral Components
The following instruction sequence may serve as an exemple:
ORL PCON,#00000001B ;Set bit IDLE,
;bit IDLS must not be set
ORL PCON,#00100000B ;Set bit IDLS,
;bit IDLE must not be set
The instruction that sets bit IDLS is the last instruction executed before going into idle mode.
Terminating the Idle Mode
– The idle mode can be terminated by activation of any enabled interrupt. The CPU operation
is resumed, the interrupt will be serviced and the next instruction to be executed after the RETI
instruction will be the one following the instruction that set the bit IDLS.
– The other possibility of terminating the idle mode is a hardware reset. Since the oscillator is
still running, the hardware reset is held active for only two machine cycles for a complete
reset.
Figure 7-44
Special Function Register PCON (Address 87H) of the SAB 80C515/80C535
87H SMOD PDS IDLS
–
GF1 GF0 PDE IDLE PCON
These bits are not used in controlling the power saving modes.
Bit
PDS
IDLS
GF1
GF0
PDE
IDLE
Function
Power-down start bit. The instruction that sets the PDS flag bit is the last
instruction before entering the power-down mode.
IDLE start bit. The instruction that sets the IDSL flag bit is the last
instruction before entering the idle mode.
General purpose flag
General purpose flag
Power-down enable bit. When set, starting the power-down mode is
enabled.
Idle mode enable bit. When set, starting the idle mode is enabled.
Semiconductor Group
104