LC890561W Datasheet, PDF (41/47 Pages) Sanyo Semicon Device – CMOS IC Digital Audio Interface Receiver with Built-in Data Buffer Memory

LC890561W
DI7
0
DI15
0
DI6
0
DI14
0
DI5
0
DI13
0
CCB address: 0xED
DI4
DI3
DTMX4
DTMX3
DI12
DI11
0
DTMY3
DI2
DTMX2
DI10
DTMY2
DI1
DTMX1
DI9
DTMY1
DI0
DTMX0
DI8
DTMY0
DTMX[4:0]
Delay time setting for DATAO output data
Setup for 48kHz SDIN input data
00000 : Non delay (default)
00001 : Delayed 10ms
00010 : Delayed 20ms
00011 : Delayed 30ms
00100 : Delayed 40ms
00101 : Delayed 50ms
00110 : Delayed 60ms
00111 : Delayed 70ms
01000 : Delayed 80ms
01001 : Delayed 90ms
01010 : Delayed 100ms
01011 : Delayed 110ms
01100 : Delayed 120ms
01101 : Delayed 130ms
01110 : Delayed 140ms
01111 : Delayed 150ms
10000
Delayed 160ms
10001
Delayed 170ms
10010
Delayed 180ms
10011
Delayed 190ms
10100
Delayed 200ms
10101
Delayed 210ms
10110
Delayed 220ms
10111
Delayed 230ms
11000
Delayed 240ms
11001
Delayed 250ms
11010
Delayed to the maximum
11011
Non delay
11100
Non delay
11101
Non delay
11110
Non delay
11111
Non delay
The delay value at the time of 11010 setup is as follows.
When fs=48kHz, delayed 256ms
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