LC890561W Datasheet, PDF (24/47 Pages) Sanyo Semicon Device – CMOS IC Digital Audio Interface Receiver with Built-in Data Buffer Memory

LC890561W
13. Output Data Delay Function (DATAO, FSB0, FSB1, DLMP)
• It has built-in RAM that is utilized for the lip synchronization function that delays the sound data to the movie.
• Output data can be delayed for 256ms (fs = 48kHz) at the maximum.
• Delay processing of output data supports 24bit width data.
• The delayed data is outputted from DATAO terminal, not from DATAO2 terminal.
• Delay processing of output data is possible for demodulated data during PLL lock and serial audio data entered from
the SDIN terminal.
• V, U and C bits transferred with S/PDIF input data are not delayed.
• The signal that can be used for delay setting control of output data is outputted from FSB0, FSB1 and DLMP
terminals.
13.1 How to Set
13.1.1 Output Data Delay Setup after Recovery Processing (DTMA[4:0], DTMB[3:0], DTMC[2:0])
• Output data delay after demodulation is set up by DTMA[4:0], DTMB[3:0] and DTMC[2:0] commands.
• It is possible to set different delay time for every input sampling frequency band by 10ms step unit.
• The delay time of 32kHz, 44.1kHz and 48kHz input data are set up with DTMA[4:0] commands.
• The delay time of 88.2kHz and 96kHz input data are set up with DTMB[3:0] commands.
• The delay time of 176.4kHz and 192kHz input data are set up with DTMC[2:0] commands.
Table 13.1 Delay Time Setup of Output Data for the Data after Recovery Processing
Delay time
(sec)
Data fs after recovery processing (Hz) and setting commands
32k, 44.1k, 48k
88.2k, 96k
176.4k, 192k
(DTMA[4:0])
(DTMB[3:0])
(DTMC[2:0])
0
○
○
○
10m
○
○
○
20m
○
○
○
30m
○
40m
○
50m
○
60m
○
70m
○
80m
○
90m
○
100m
○
110m
○
120m
○
130m
○
140m
○
150m
○
160m
○
170m
○
180m
○
190m
○
200m
○
210m
○
220m
○
230m
○
240m
○
○
○
○
○
○
○
○
○
○
‹
○
○
○
○
○
‹
See section “14.5.2 Details of Write Commands”
250m
○
Max.
‹
(“○” can be set, “‹” maximum delay time is set)
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