LC890561W Datasheet, PDF (4/47 Pages) Sanyo Semicon Device – CMOS IC Digital Audio Interface Receiver with Built-in Data Buffer Memory

LC890561W
Continued from preceding page.
Pin No.
Name
I/O
Function
28
F2/DLMP
O Input fs calculation signal output pin || Output data delay mute period monitor output pin
29
VF/DATAO2
O Validity flag output pin/Data output pin (Delay is impossible)
30
DVDD
-
Digital power supply (3.3V)
31
DGND
-
Digital GND
32
VREF
O Regulator monitor output pin (1.8V)
33
BPSYNC
O Non-PCM burst preamble Pa, Pb, Pc, Pd sync signal output pin
34
ERROR
O PLL lock error or data error flag output pin
35
DO
O5 Microcontroller I/F, read data output pin
36
DI
I5 Microcontroller I/F, write data input pin
37
CE
I5 Microcontroller I/F, chip enable input pin
38
CL
I5 Microcontroller I/F, clock input pin
39
XSEL
I5 [XIN] crystal oscillation selection input pin (24.576MHz or 12.288MHz)
40
MODE0
I5 Mode setting input pin
41
MODE1
I5 Mode setting input pin
42
DGND
-
Digital GND
43
DVDD
-
Digital power supply (3.3V)
44
DOSEL0
I5 Output data format selection input pin
45
DOSEL1
I5 Output data format selection input pin
46
CKSEL0
I5 Output clock selection input pin
47
CKSEL1
I5 Output clock selection input pin
48
XMODE
I5 System reset input pin
Note:
* Withstand voltage input/output: I or O = -0.3 to 3.6V, I5 or O5 = -0.3 to 5.5V
* To prevent logic circuit latch-up, digital power supply and analog power supply must be applied or removed
simultaneously and with the same potential.
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